diff --git a/dts/arm64/qemu/qemu-virt-a53.dtsi b/dts/arm64/qemu/qemu-virt-a53.dtsi
index 1839c2726a1..cb96eba2874 100644
--- a/dts/arm64/qemu/qemu-virt-a53.dtsi
+++ b/dts/arm64/qemu/qemu-virt-a53.dtsi
@@ -112,25 +112,41 @@
 				  0x3000000 0x80 0x00        0x80 0x00        0x80 0x00>;
 			#interrupt-cells = <0x01>;
 			interrupt-map-mask = <0x1800 0x00 0x00 0x07>;
-			interrupt-map = <0x00   0x00 0x00 1 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
-					 0x00   0x00 0x00 2 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
-					 0x00   0x00 0x00 3 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE
-					 0x00   0x00 0x00 4 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
+			interrupt-map = <0x00   0x00 0x00 1 &gic 0 0 GIC_SPI
+					 0x03 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x00   0x00 0x00 2 &gic 0 0 GIC_SPI
+					 0x04 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x00   0x00 0x00 3 &gic 0 0 GIC_SPI
+					 0x05 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x00   0x00 0x00 4 &gic 0 0 GIC_SPI
+					 0x06 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
 
-					 0x800  0x00 0x00 1 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
-					 0x800  0x00 0x00 2 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE
-					 0x800  0x00 0x00 3 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
-					 0x800  0x00 0x00 4 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
+					 0x800  0x00 0x00 1 &gic 0 0 GIC_SPI
+					 0x04 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x800  0x00 0x00 2 &gic 0 0 GIC_SPI
+					 0x05 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x800  0x00 0x00 3 &gic 0 0 GIC_SPI
+					 0x06 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x800  0x00 0x00 4 &gic 0 0 GIC_SPI
+					 0x03 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
 
-					 0x1000 0x00 0x00 1 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE
-					 0x1000 0x00 0x00 2 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
-					 0x1000 0x00 0x00 3 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
-					 0x1000 0x00 0x00 4 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
+					 0x1000 0x00 0x00 1 &gic 0 0 GIC_SPI
+					 0x05 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x1000 0x00 0x00 2 &gic 0 0 GIC_SPI
+					 0x06 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x1000 0x00 0x00 3 &gic 0 0 GIC_SPI
+					 0x03 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x1000 0x00 0x00 4 &gic 0 0 GIC_SPI
+					 0x04 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
 
-					 0x1800 0x00 0x00 1 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
-					 0x1800 0x00 0x00 2 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
-					 0x1800 0x00 0x00 3 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
-					 0x1800 0x00 0x00 4 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE>;
+					 0x1800 0x00 0x00 1 &gic 0 0 GIC_SPI
+					 0x06 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x1800 0x00 0x00 2 &gic 0 0 GIC_SPI
+					 0x03 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x1800 0x00 0x00 3 &gic 0 0 GIC_SPI
+					 0x04 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x1800 0x00 0x00 4 &gic 0 0 GIC_SPI
+					 0x05 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
 			msi-parent = <&its>;
 			bus-range = <0x00 0xff>;
 		};
diff --git a/dts/arm64/qemu/qemu-virt-arm64.dtsi b/dts/arm64/qemu/qemu-virt-arm64.dtsi
index 0460c70f073..dd6916fe4db 100644
--- a/dts/arm64/qemu/qemu-virt-arm64.dtsi
+++ b/dts/arm64/qemu/qemu-virt-arm64.dtsi
@@ -112,25 +112,41 @@
 				  0x3000000 0x80 0x00        0x80 0x00        0x80 0x00>;
 			#interrupt-cells = <0x01>;
 			interrupt-map-mask = <0x1800 0x00 0x00 0x07>;
-			interrupt-map = <0x00   0x00 0x00 1 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
-					 0x00   0x00 0x00 2 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
-					 0x00   0x00 0x00 3 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE
-					 0x00   0x00 0x00 4 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
+			interrupt-map = <0x00   0x00 0x00 1 &gic 0 0 GIC_SPI
+					 0x03 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x00   0x00 0x00 2 &gic 0 0 GIC_SPI
+					 0x04 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x00   0x00 0x00 3 &gic 0 0 GIC_SPI
+					 0x05 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x00   0x00 0x00 4 &gic 0 0 GIC_SPI
+					 0x06 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
 
-					 0x800  0x00 0x00 1 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
-					 0x800  0x00 0x00 2 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE
-					 0x800  0x00 0x00 3 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
-					 0x800  0x00 0x00 4 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
+					 0x800  0x00 0x00 1 &gic 0 0 GIC_SPI
+					 0x04 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x800  0x00 0x00 2 &gic 0 0 GIC_SPI
+					 0x05 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x800  0x00 0x00 3 &gic 0 0 GIC_SPI
+					 0x06 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x800  0x00 0x00 4 &gic 0 0 GIC_SPI
+					 0x03 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
 
-					 0x1000 0x00 0x00 1 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE
-					 0x1000 0x00 0x00 2 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
-					 0x1000 0x00 0x00 3 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
-					 0x1000 0x00 0x00 4 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
+					 0x1000 0x00 0x00 1 &gic 0 0 GIC_SPI
+					 0x05 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x1000 0x00 0x00 2 &gic 0 0 GIC_SPI
+					 0x06 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x1000 0x00 0x00 3 &gic 0 0 GIC_SPI
+					 0x03 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x1000 0x00 0x00 4 &gic 0 0 GIC_SPI
+					 0x04 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
 
-					 0x1800 0x00 0x00 1 &gic 0 0 GIC_SPI 0x06 IRQ_TYPE_EDGE
-					 0x1800 0x00 0x00 2 &gic 0 0 GIC_SPI 0x03 IRQ_TYPE_EDGE
-					 0x1800 0x00 0x00 3 &gic 0 0 GIC_SPI 0x04 IRQ_TYPE_EDGE
-					 0x1800 0x00 0x00 4 &gic 0 0 GIC_SPI 0x05 IRQ_TYPE_EDGE>;
+					 0x1800 0x00 0x00 1 &gic 0 0 GIC_SPI
+					 0x06 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x1800 0x00 0x00 2 &gic 0 0 GIC_SPI
+					 0x03 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x1800 0x00 0x00 3 &gic 0 0 GIC_SPI
+					 0x04 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY
+					 0x1800 0x00 0x00 4 &gic 0 0 GIC_SPI
+					 0x05 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
 			msi-parent = <&its>;
 			bus-range = <0x00 0xff>;
 		};