boards/olimexino_stm32: add new board

Add configuration for OLIMEXINO_STM32 board.
By default, the UART console is forwarded to USART1 available on
UEXT connector. All GPIO ports available on the connecot headers
are enabled.

Change-Id: I60b3ff20ea60b5294a3a6c31f4dba0802794f9d8
Origin: Based on nucleo_f103rb board
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>

boards/olimexino_stm32/Kconfig.board

@@ -0,0 +1,19 @@
+# Kconfig - OLIMEXINO-STM32 board configuration
+#
+# Copyright (c) 2016, I-SENSE group of ICCS
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+config  BOARD_OLIMEXINO_STM32
+        bool "OLIMEXINO-STM32 Development Board"
+        depends on SOC_STM32F103RB

boards/olimexino_stm32/Kconfig.defconfig

@@ -0,0 +1,23 @@
+# Kconfig - OLIMEXINO-STM32 board configuration
+#
+# Copyright (c) 2016, I-SENSE group of ICCS
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if BOARD_OLIMEXINO_STM32
+
+config BOARD
+        default olimexino_stm32
+
+endif # BOARD_OLIMEXINO_STM32

boards/olimexino_stm32/Makefile

@@ -0,0 +1,5 @@
+ccflags-y += -I$(srctree)/include/drivers
+ccflags-y += -I$(srctree)/drivers
+asflags-y := ${ccflags-y}
+
+obj-y += board.o

boards/olimexino_stm32/board.c

@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2016 Open-RnD Sp. z o.o.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "board.h"

boards/olimexino_stm32/board.h

@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2015 Intel Corporation
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __INC_BOARD_H
+#define __INC_BOARD_H
+
+#include <soc.h>
+
+#endif /* __INC_BOARD_H */

boards/olimexino_stm32/olimexino_stm32_defconfig

@@ -0,0 +1,44 @@
+CONFIG_ARM=y
+CONFIG_BOARD_OLIMEXINO_STM32=y
+CONFIG_SOC_FAMILY_STM32=y
+CONFIG_SOC_SERIES_STM32F1X=y
+CONFIG_SOC_STM32F103RB=y
+CONFIG_CORTEX_M_SYSTICK=y
+# 72MHz system clock
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
+
+# enable uart driver
+CONFIG_SERIAL=y
+CONFIG_UART_STM32=y
+# enable USART1
+CONFIG_UART_STM32_PORT_0=y
+CONFIG_UART_STM32_PORT_0_BAUD_RATE=115200
+# enable console on this port by default
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_0"
+
+
+# enable pinmux
+CONFIG_PINMUX=y
+CONFIG_PINMUX_STM32=y
+
+# enable GPIO ports A, B, C, D
+CONFIG_GPIO=y
+CONFIG_GPIO_STM32=y
+CONFIG_GPIO_STM32_PORTA=y
+CONFIG_GPIO_STM32_PORTB=y
+CONFIG_GPIO_STM32_PORTC=y
+CONFIG_GPIO_STM32_PORTD=y
+
+# clock configuration
+CONFIG_CLOCK_CONTROL=y
+CONFIG_CLOCK_CONTROL_STM32F10X=y
+CONFIG_CLOCK_STM32F10X_SYSCLK_SRC_PLL=y
+# use HSE as PLL input
+CONFIG_CLOCK_STM32F10X_PLL_SRC_HSE=y
+CONFIG_CLOCK_STM32F10X_PLL_MULTIPLIER=9
+CONFIG_CLOCK_STM32F10X_AHB_PRESCALER=0
+# APB1 clock must not exceed 36MHz limit
+CONFIG_CLOCK_STM32F10X_APB1_PRESCALER=2
+CONFIG_CLOCK_STM32F10X_APB2_PRESCALER=0

drivers/pinmux/Makefile

@@ -4,6 +4,7 @@ ccflags-y +=-I$(srctree)/drivers
 obj-$(CONFIG_PINMUX_K64) += frdm_k64f/pinmux_k64.o frdm_k64f/pinmux_board_frdm_k64f.o
 obj-$(CONFIG_PINMUX_STM32) += stm32/pinmux_stm32.o
 obj-$(CONFIG_BOARD_NUCLEO_F103RB) += stm32/pinmux_board_nucleo_f103rb.o
+obj-$(CONFIG_BOARD_OLIMEXINO_STM32) += stm32/pinmux_board_olimexino_stm32.o
 obj-$(CONFIG_BOARD_STM32_MINI_A15) += stm32/pinmux_board_stm32_mini_a15.o
 obj-$(CONFIG_BOARD_ARDUINO_101) += quark_mcu/pinmux_board_arduino_101.o
 obj-$(CONFIG_BOARD_ARDUINO_DUE) += sam3x/pinmux_board_arduino_due.o
@@ -13,4 +14,3 @@ obj-$(CONFIG_BOARD_QUARK_SE_DEVBOARD) += quark_mcu/pinmux_board_quark_se_dev.o
 
 # "runtime" pinmux
 obj-$(CONFIG_PINMUX_DEV) += dev/
-

drivers/pinmux/stm32/pinmux_board_olimexino_stm32.c

@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2016 Open-RnD Sp. z o.o.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <nanokernel.h>
+#include <device.h>
+#include <init.h>
+#include <pinmux.h>
+#include <sys_io.h>
+#include "pinmux/pinmux.h"
+
+#include "pinmux_stm32.h"
+
+/* pin assignments for NUCLEO-F103RB board */
+static const struct pin_config pinconf[] = {
+#ifdef CONFIG_UART_STM32_PORT_0
+	{STM32_PIN_PA9,  STM32F1_PINMUX_FUNC_PA9_USART1_TX},
+	{STM32_PIN_PA10, STM32F1_PINMUX_FUNC_PA10_USART1_RX},
+#endif	/* CONFIG_UART_STM32_PORT_0 */
+#ifdef CONFIG_UART_STM32_PORT_1
+	{STM32_PIN_PA2, STM32F1_PINMUX_FUNC_PA2_USART2_TX},
+	{STM32_PIN_PA3, STM32F1_PINMUX_FUNC_PA3_USART2_RX},
+#endif	/* CONFIG_UART_STM32_PORT_1 */
+#ifdef CONFIG_UART_STM32_PORT_2
+	{STM32_PIN_PB10, STM32F1_PINMUX_FUNC_PB10_USART3_TX},
+	{STM32_PIN_PB11, STM32F1_PINMUX_FUNC_PB11_USART3_RX},
+#endif	/* CONFIG_UART_STM32_PORT_2 */
+};
+
+static int pinmux_stm32_init(struct device *port)
+{
+	ARG_UNUSED(port);
+
+	stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
+
+	return 0;
+}
+
+SYS_INIT(pinmux_stm32_init, PRIMARY, CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);