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esp32 & esp32s2: lint: kconfig

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fixes indentation of esp32 and esp32s2 kconfig
soc files.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
This commit is contained in:
Glauber Maroto Ferreira 2021-11-17 19:56:19 -03:00 • committed by Anas Nashif
commit ddd0a82ac7
2 changed files with 134 additions and 129 deletions
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69
soc/xtensa/esp32/Kconfig.soc
View file

@ -60,22 +60,22 @@ config ESP_HEAP_SEARCH_ALL_REGIONS
menu "SPI RAM config" menu "SPI RAM config"
depends on ESP_SPIRAM depends on ESP_SPIRAM
choice SPIRAM_TYPE choice SPIRAM_TYPE
prompt "Type of SPI RAM chip in use" prompt "Type of SPI RAM chip in use"
default SPIRAM_TYPE_ESPPSRAM16 default SPIRAM_TYPE_ESPPSRAM16
config SPIRAM_TYPE_ESPPSRAM16 config SPIRAM_TYPE_ESPPSRAM16
bool "ESP-PSRAM16 or APS1604" bool "ESP-PSRAM16 or APS1604"
config SPIRAM_TYPE_ESPPSRAM32 config SPIRAM_TYPE_ESPPSRAM32
bool "ESP-PSRAM32 or IS25WP032" bool "ESP-PSRAM32 or IS25WP032"
config SPIRAM_TYPE_ESPPSRAM64 config SPIRAM_TYPE_ESPPSRAM64
bool "ESP-PSRAM64 or LY68L6400" bool "ESP-PSRAM64 or LY68L6400"
endchoice endchoice # SPIRAM_TYPE
config ESP_SPIRAM_SIZE config ESP_SPIRAM_SIZE
int "Size of SPIRAM part" int "Size of SPIRAM part"
default 2097152 if SPIRAM_TYPE_ESPPSRAM16 default 2097152 if SPIRAM_TYPE_ESPPSRAM16
default 4194304 if SPIRAM_TYPE_ESPPSRAM32 default 4194304 if SPIRAM_TYPE_ESPPSRAM32
@ -85,33 +85,35 @@ menu "SPI RAM config"
NOTE: If SPIRAM size is greater than 4MB, only NOTE: If SPIRAM size is greater than 4MB, only
lower 4MB can be allocated using k_malloc(). lower 4MB can be allocated using k_malloc().
choice SPIRAM_SPEED choice SPIRAM_SPEED
prompt "Set RAM clock speed" prompt "Set RAM clock speed"
default SPIRAM_SPEED_40M default SPIRAM_SPEED_40M
help help
Select the speed for the SPI RAM chip. Select the speed for the SPI RAM chip.
If SPI RAM is enabled, we only support three combinations of SPI speed mode we supported now: If SPI RAM is enabled, we only support three combinations of SPI speed mode we supported now:
1. Flash SPI running at 40Mhz and RAM SPI running at 40Mhz 1. Flash SPI running at 40MHz and RAM SPI running at 40MHz
2. Flash SPI running at 80Mhz and RAM SPI running at 40Mhz 2. Flash SPI running at 80MHz and RAM SPI running at 40MHz
3. Flash SPI running at 80Mhz and RAM SPI running at 80Mhz 3. Flash SPI running at 80MHz and RAM SPI running at 80MHz
Note: If the third mode(80Mhz+80Mhz) is enabled for SPI RAM of type 32MBit, one of the HSPI/VSPI host Note: If the third mode(80MHz+80MHz) is enabled for SPI RAM of type 32MBit, one of the HSPI/VSPI host
will be occupied by the system. Which SPI host to use can be selected by the config item will be occupied by the system. Which SPI host to use can be selected by the config item
SPIRAM_OCCUPY_SPI_HOST. Application code should never touch HSPI/VSPI hardware in this case. The SPIRAM_OCCUPY_SPI_HOST. Application code should never touch HSPI/VSPI hardware in this case. The
option to select 80MHz will only be visible if the flash SPI speed is also 80MHz. option to select 80MHz will only be visible if the flash SPI speed is also 80MHz.
(ESPTOOLPY_FLASHFREQ_79M is true) (ESPTOOLPY_FLASHFREQ_79M is true)
config SPIRAM_SPEED_40M config SPIRAM_SPEED_40M
bool "40MHz clock speed" bool "40MHz clock speed"
config SPIRAM_SPEED_80M
config SPIRAM_SPEED_80M
depends on ESPTOOLPY_FLASHFREQ_80M depends on ESPTOOLPY_FLASHFREQ_80M
bool "80MHz clock speed" bool "80MHz clock speed"
endchoice
menu "PSRAM clock and cs IO for ESP32-DOWD" endchoice # SPIRAM_SPEED
config D0WD_PSRAM_CLK_IO menu "PSRAM clock and cs IO for ESP32-DOWD"
config D0WD_PSRAM_CLK_IO
int "PSRAM CLK IO number" int "PSRAM CLK IO number"
range 0 33 range 0 33
default 17 default 17
@ -119,18 +121,19 @@ menu "SPI RAM config"
The PSRAM CLOCK IO can be any unused GPIO, user can config it based on hardware design. If user use The PSRAM CLOCK IO can be any unused GPIO, user can config it based on hardware design. If user use
1.8V flash and 1.8V psram, this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17. 1.8V flash and 1.8V psram, this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
config D0WD_PSRAM_CS_IO config D0WD_PSRAM_CS_IO
int "PSRAM CS IO number" int "PSRAM CS IO number"
range 0 33 range 0 33
default 16 default 16
help help
The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design. If user use The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design. If user use
1.8V flash and 1.8V psram, this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17. 1.8V flash and 1.8V psram, this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
endmenu
menu "PSRAM clock and cs IO for ESP32-D2WD" endmenu # PSRAM clock and cs IO for ESP32-DOWD
config D2WD_PSRAM_CLK_IO menu "PSRAM clock and cs IO for ESP32-D2WD"
config D2WD_PSRAM_CLK_IO
int "PSRAM CLK IO number" int "PSRAM CLK IO number"
range 0 33 range 0 33
default 9 default 9
@ -138,18 +141,19 @@ menu "SPI RAM config"
User can config it based on hardware design. For ESP32-D2WD chip, the psram can only be 1.8V psram, User can config it based on hardware design. For ESP32-D2WD chip, the psram can only be 1.8V psram,
so this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17. so this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
config D2WD_PSRAM_CS_IO config D2WD_PSRAM_CS_IO
int "PSRAM CS IO number" int "PSRAM CS IO number"
range 0 33 range 0 33
default 10 default 10
help help
User can config it based on hardware design. For ESP32-D2WD chip, the psram can only be 1.8V psram, User can config it based on hardware design. For ESP32-D2WD chip, the psram can only be 1.8V psram,
so this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17. so this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
endmenu
menu "PSRAM clock and cs IO for ESP32-PICO" endmenu # PSRAM clock and cs IO for ESP32-D2WD
config PICO_PSRAM_CS_IO menu "PSRAM clock and cs IO for ESP32-PICO"
config PICO_PSRAM_CS_IO
int "PSRAM CS IO number" int "PSRAM CS IO number"
range 0 33 range 0 33
default 10 default 10
@ -161,9 +165,9 @@ menu "SPI RAM config"
For the reference hardware design, please refer to For the reference hardware design, please refer to
https://www.espressif.com/sites/default/files/documentation/esp32-pico-d4_datasheet_en.pdf https://www.espressif.com/sites/default/files/documentation/esp32-pico-d4_datasheet_en.pdf
endmenu endmenu # PSRAM clock and cs IO for ESP32-PICO
config SPIRAM_CUSTOM_SPIWP_SD3_PIN config SPIRAM_CUSTOM_SPIWP_SD3_PIN
bool "Use custom SPI PSRAM WP(SD3) Pin when flash pins set in eFuse (read help)" bool "Use custom SPI PSRAM WP(SD3) Pin when flash pins set in eFuse (read help)"
default y if SPIRAM_SPIWP_SD3_PIN != 7 # backwards compatibility, can remove in IDF 5 default y if SPIRAM_SPIWP_SD3_PIN != 7 # backwards compatibility, can remove in IDF 5
default n default n
@ -182,7 +186,7 @@ menu "SPI RAM config"
When flash mode is set to QIO or QOUT, the PSRAM WP pin will be set the same as the SPI Flash WP pin When flash mode is set to QIO or QOUT, the PSRAM WP pin will be set the same as the SPI Flash WP pin
configured in the bootloader. configured in the bootloader.
config SPIRAM_SPIWP_SD3_PIN config SPIRAM_SPIWP_SD3_PIN
int "Custom SPI PSRAM WP(SD3) Pin" int "Custom SPI PSRAM WP(SD3) Pin"
range 0 33 range 0 33
default 7 default 7
@ -192,10 +196,11 @@ menu "SPI RAM config"
If burning a customized set of SPI flash pins in eFuse and using DIO or DOUT mode for flash, set this If burning a customized set of SPI flash pins in eFuse and using DIO or DOUT mode for flash, set this
value to the GPIO number of the SPIRAM WP pin. value to the GPIO number of the SPIRAM WP pin.
config SPIRAM config SPIRAM
bool bool
default y default y
endmenu
endmenu # SPI RAM config
choice ESP32_UNIVERSAL_MAC_ADDRESSES choice ESP32_UNIVERSAL_MAC_ADDRESSES
bool "Number of universally administered (by IEEE) MAC address" bool "Number of universally administered (by IEEE) MAC address"
@ -215,19 +220,19 @@ choice ESP32_UNIVERSAL_MAC_ADDRESSES
When using a custom universal MAC address range, the correct setting will depend on the When using a custom universal MAC address range, the correct setting will depend on the
allocation of MAC addresses in this range (either 2 or 4 per device.) allocation of MAC addresses in this range (either 2 or 4 per device.)
config ESP32_UNIVERSAL_MAC_ADDRESSES_TWO config ESP32_UNIVERSAL_MAC_ADDRESSES_TWO
bool "Two" bool "Two"
select ESP_MAC_ADDR_UNIVERSE_WIFI_STA select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
select ESP_MAC_ADDR_UNIVERSE_BT select ESP_MAC_ADDR_UNIVERSE_BT
config ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR config ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
bool "Four" bool "Four"
select ESP_MAC_ADDR_UNIVERSE_WIFI_STA select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
select ESP_MAC_ADDR_UNIVERSE_WIFI_AP select ESP_MAC_ADDR_UNIVERSE_WIFI_AP
select ESP_MAC_ADDR_UNIVERSE_BT select ESP_MAC_ADDR_UNIVERSE_BT
select ESP_MAC_ADDR_UNIVERSE_ETH select ESP_MAC_ADDR_UNIVERSE_ETH
endchoice endchoice # ESP32_UNIVERSAL_MAC_ADDRESSES
config ESP_MAC_ADDR_UNIVERSE_WIFI_AP config ESP_MAC_ADDR_UNIVERSE_WIFI_AP
bool bool

6
soc/xtensa/esp32s2/Kconfig.soc
View file

@ -191,16 +191,16 @@ choice ESP32S2_UNIVERSAL_MAC_ADDRESSES
When using a custom universal MAC address range, the correct setting will depend on the When using a custom universal MAC address range, the correct setting will depend on the
allocation of MAC addresses in this range (either 1 or 2 per device). allocation of MAC addresses in this range (either 1 or 2 per device).
config ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE config ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE
bool "Two" bool "Two"
select ESP_MAC_ADDR_UNIVERSE_WIFI_STA select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
config ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO config ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO
bool "Two" bool "Two"
select ESP_MAC_ADDR_UNIVERSE_WIFI_STA select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
select ESP_MAC_ADDR_UNIVERSE_WIFI_AP select ESP_MAC_ADDR_UNIVERSE_WIFI_AP
endchoice endchoice # ESP32S2_UNIVERSAL_MAC_ADDRESSES
config ESP_MAC_ADDR_UNIVERSE_WIFI_AP config ESP_MAC_ADDR_UNIVERSE_WIFI_AP
bool bool