michaelh/zephyr
1
0
Fork 0
Code Releases Activity

x86_64: fix sendling locore EOI

Browse source 
The address was being truncated because we were using
32-bit registers. CONFIG_MMU is always enabled on 64-bit,
remove the #ifdef.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2020-07-20 11:33:53 -07:00 • committed by Anas Nashif
commit ddb63c404f
1 changed files with 3 additions and 7 deletions
Download patch file Download diff file Expand all files Collapse all files

10
arch/x86/core/intel64/locore.S
View file

@ -692,18 +692,14 @@ irq_dispatch:
movq x86_irq_args(,%rcx,8), %rdi
call *%rbx
xorl %eax, %eax
xorq %rax, %rax
#ifdef CONFIG_X2APIC
xorl %edx, %edx
movl $(X86_X2APIC_BASE_MSR + (LOAPIC_EOI >> 4)), %ecx
wrmsr
#else /* xAPIC */
#ifdef DEVICE_MMIO_IS_IN_RAM
movl z_loapic_regs, %edx
movl %eax, LOAPIC_EOI(%edx)
#else
movl %eax, (CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_EOI)
#endif /* DEVICE_MMIO_IS_IN_RAM */
movq z_loapic_regs, %rdx
movq %rax, LOAPIC_EOI(%rdx)
#endif /* CONFIG_X2APIC */
movq %gs:__x86_tss64_t_cpu_OFFSET, %rsi