counter: nxp_pit: allow to specify max load value
The PIT maximum load value may not be always 32-bit. Allow the SoC to define this value from devicetree. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
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4 changed files with 9 additions and 2 deletions
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@ -172,7 +172,7 @@ static const struct counter_driver_api mcux_pit_driver_api = {
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static struct mcux_pit_data mcux_pit_data_##n; \
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static const struct mcux_pit_config mcux_pit_config_##n = { \
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.info = { \
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.max_top_value = UINT32_MAX, \
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.max_top_value = DT_INST_PROP(n, max_load_value), \
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.channels = 0, \
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.freq = DT_INST_PROP(n, clock_frequency), \
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}, \
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@ -536,6 +536,7 @@
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pit-channel = <0>;
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pit-period = <1000000>;
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clock-frequency = <60000000>;
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max-load-value = <0xffffffff>;
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};
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};
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};
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@ -395,6 +395,7 @@
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pit-channel = <0>;
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pit-period = <1000000>;
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clock-frequency = <60000000>;
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max-load-value = <0xffffffff>;
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};
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edma0: dma-controller@40008000 {
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@ -1,4 +1,4 @@
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# Copyright 2020 NXP
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# Copyright 2020,2023 NXP
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# SPDX-License-Identifier: Apache-2.0
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description: NXP MCUX Periodic Interrupt Timer (PIT)
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@ -20,3 +20,8 @@ properties:
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type: int
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required: true
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description: pit default period in us
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max-load-value:
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type: int
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required: true
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description: maximum load value supported
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