counter: nxp_pit: allow to specify max load value

The PIT maximum load value may not be always 32-bit. Allow the SoC to
define this value from devicetree.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit is contained in:
Manuel Argüelles 2023-09-19 18:27:53 +07:00 committed by Carles Cufí
commit ddaacd9ee8
4 changed files with 9 additions and 2 deletions

View file

@ -172,7 +172,7 @@ static const struct counter_driver_api mcux_pit_driver_api = {
static struct mcux_pit_data mcux_pit_data_##n; \ static struct mcux_pit_data mcux_pit_data_##n; \
static const struct mcux_pit_config mcux_pit_config_##n = { \ static const struct mcux_pit_config mcux_pit_config_##n = { \
.info = { \ .info = { \
.max_top_value = UINT32_MAX, \ .max_top_value = DT_INST_PROP(n, max_load_value), \
.channels = 0, \ .channels = 0, \
.freq = DT_INST_PROP(n, clock_frequency), \ .freq = DT_INST_PROP(n, clock_frequency), \
}, \ }, \

View file

@ -536,6 +536,7 @@
pit-channel = <0>; pit-channel = <0>;
pit-period = <1000000>; pit-period = <1000000>;
clock-frequency = <60000000>; clock-frequency = <60000000>;
max-load-value = <0xffffffff>;
}; };
}; };
}; };

View file

@ -395,6 +395,7 @@
pit-channel = <0>; pit-channel = <0>;
pit-period = <1000000>; pit-period = <1000000>;
clock-frequency = <60000000>; clock-frequency = <60000000>;
max-load-value = <0xffffffff>;
}; };
edma0: dma-controller@40008000 { edma0: dma-controller@40008000 {

View file

@ -1,4 +1,4 @@
# Copyright 2020 NXP # Copyright 2020,2023 NXP
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
description: NXP MCUX Periodic Interrupt Timer (PIT) description: NXP MCUX Periodic Interrupt Timer (PIT)
@ -20,3 +20,8 @@ properties:
type: int type: int
required: true required: true
description: pit default period in us description: pit default period in us
max-load-value:
type: int
required: true
description: maximum load value supported