diff --git a/arch/x86/core/CMakeLists.txt b/arch/x86/core/CMakeLists.txt index 9268dc4cf4d..e8055c6fae2 100644 --- a/arch/x86/core/CMakeLists.txt +++ b/arch/x86/core/CMakeLists.txt @@ -16,6 +16,7 @@ zephyr_library_sources_ifdef(CONFIG_REBOOT_RST_CNT reboot_rst_cnt.c) zephyr_library_sources_ifdef(CONFIG_MULTIBOOT_INFO multiboot.c) zephyr_library_sources_ifdef(CONFIG_X86_EFI efi.c) zephyr_library_sources_ifdef(CONFIG_ACPI legacy_bios.c) +zephyr_library_sources_ifdef(CONFIG_ACPI x86_acpi.c) zephyr_library_sources_ifdef(CONFIG_X86_MMU x86_mmu.c) zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.c) zephyr_library_sources_ifdef(CONFIG_ARCH_CACHE cache.c) diff --git a/arch/x86/core/x86_acpi.c b/arch/x86/core/x86_acpi.c new file mode 100644 index 00000000000..badbd3b414f --- /dev/null +++ b/arch/x86/core/x86_acpi.c @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2023, Intel Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include +#include + +uint32_t arch_acpi_encode_irq_flags(uint8_t polarity, uint8_t trigger) +{ + uint32_t irq_flag = IRQ_DELIVERY_LOWEST; + + if (trigger == ACPI_LEVEL_SENSITIVE) { + irq_flag |= IRQ_TYPE_LEVEL; + } else { + irq_flag |= IRQ_TYPE_EDGE; + } + + if (polarity == ACPI_ACTIVE_HIGH) { + irq_flag |= IRQ_TYPE_HIGH; + } else if (polarity == ACPI_ACTIVE_LOW) { + irq_flag |= IRQ_TYPE_LOW; + } + + return irq_flag; +} diff --git a/include/zephyr/arch/x86/arch_inlines.h b/include/zephyr/arch/x86/arch_inlines.h index 4b255acc853..356e7920c66 100644 --- a/include/zephyr/arch/x86/arch_inlines.h +++ b/include/zephyr/arch/x86/arch_inlines.h @@ -10,6 +10,8 @@ #ifndef _ASMLANGUAGE +#include + #if defined(CONFIG_X86_64) #include diff --git a/include/zephyr/arch/x86/x86_acpi.h b/include/zephyr/arch/x86/x86_acpi.h new file mode 100644 index 00000000000..013400e6fe6 --- /dev/null +++ b/include/zephyr/arch/x86/x86_acpi.h @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2023, Intel Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @brief Encode interrupt flag for x86 architecture. + * + * @param polarity the interrupt polarity received from ACPICA lib + * @param trigger the interrupt level received from ACPICA lib + * @return return encoded interrupt flag + */ +uint32_t arch_acpi_encode_irq_flags(uint8_t polarity, uint8_t trigger);