From dd3ee06af71fc44dded798b8cce7616e762804e7 Mon Sep 17 00:00:00 2001 From: Francois Ramu Date: Mon, 1 Jul 2019 16:46:34 +0200 Subject: [PATCH] drivers: gpio: Add STM32G0X pinmux support Add gpio support for STM32G0X SoC series. Signed-off-by: Philippe Retornaz Signed-off-by: Francois Ramu # Conflicts: # drivers/gpio/gpio_stm32.h --- drivers/gpio/gpio_stm32.h | 7 +++ dts/arm/st/g0/stm32g0.dtsi | 45 ++++++++++++++++++ .../st_stm32/stm32g0/Kconfig.defconfig.series | 8 ++++ soc/arm/st_stm32/stm32g0/dts_fixup.h | 47 +++++++++++++++++++ soc/arm/st_stm32/stm32g0/soc.h | 4 ++ 5 files changed, 111 insertions(+) diff --git a/drivers/gpio/gpio_stm32.h b/drivers/gpio/gpio_stm32.h index 8b89590fc29..2968d3664f4 100644 --- a/drivers/gpio/gpio_stm32.h +++ b/drivers/gpio/gpio_stm32.h @@ -96,6 +96,13 @@ #define STM32_PERIPH_GPIOI LL_AHB4_GRP1_PERIPH_GPIOI #define STM32_PERIPH_GPIOJ LL_AHB4_GRP1_PERIPH_GPIOJ #define STM32_PERIPH_GPIOK LL_AHB4_GRP1_PERIPH_GPIOK +#elif CONFIG_SOC_SERIES_STM32G0X +#define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_IOP +#define STM32_PERIPH_GPIOA LL_IOP_GRP1_PERIPH_GPIOA +#define STM32_PERIPH_GPIOB LL_IOP_GRP1_PERIPH_GPIOB +#define STM32_PERIPH_GPIOC LL_IOP_GRP1_PERIPH_GPIOC +#define STM32_PERIPH_GPIOD LL_IOP_GRP1_PERIPH_GPIOD +#define STM32_PERIPH_GPIOF LL_IOP_GRP1_PERIPH_GPIOF #elif CONFIG_SOC_SERIES_STM32L0X #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_IOP #define STM32_PERIPH_GPIOA LL_IOP_GRP1_PERIPH_GPIOA diff --git a/dts/arm/st/g0/stm32g0.dtsi b/dts/arm/st/g0/stm32g0.dtsi index 8020b10d4c3..ded83727ec0 100644 --- a/dts/arm/st/g0/stm32g0.dtsi +++ b/dts/arm/st/g0/stm32g0.dtsi @@ -59,6 +59,51 @@ #address-cells = <1>; #size-cells = <1>; reg = <0x50000000 0x2000>; + + gpioa: gpio@50000000 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x50000000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_IOP 0x00000001>; + label = "GPIOA"; + }; + + gpiob: gpio@50000400 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x50000400 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_IOP 0x00000002>; + label = "GPIOB"; + }; + + gpioc: gpio@50000800 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x50000800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_IOP 0x00000004>; + label = "GPIOC"; + }; + + gpiod: gpio@50000c00 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x50000c00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_IOP 0x00000008>; + label = "GPIOD"; + }; + + gpiof: gpio@50001400 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x50001400 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_IOP 0x00000020>; + label = "GPIOF"; + }; }; timers3: timers@40000400 { diff --git a/soc/arm/st_stm32/stm32g0/Kconfig.defconfig.series b/soc/arm/st_stm32/stm32g0/Kconfig.defconfig.series index a9489e220cf..9b86af6b10f 100644 --- a/soc/arm/st_stm32/stm32g0/Kconfig.defconfig.series +++ b/soc/arm/st_stm32/stm32g0/Kconfig.defconfig.series @@ -15,6 +15,14 @@ config SOC_SERIES if GPIO_STM32 +# GPIO ports A, B and C are set in ../common/Kconfig.defconfig.series + +config GPIO_STM32_PORTD + default y + +config GPIO_STM32_PORTF + default y + endif # GPIO_STM32 endif # SOC_SERIES_STM32G0X diff --git a/soc/arm/st_stm32/stm32g0/dts_fixup.h b/soc/arm/st_stm32/stm32g0/dts_fixup.h index 8c699bbcac6..31695d4f8fb 100644 --- a/soc/arm/st_stm32/stm32g0/dts_fixup.h +++ b/soc/arm/st_stm32/stm32g0/dts_fixup.h @@ -14,4 +14,51 @@ #define DT_PWM_STM32_3_DEV_NAME DT_ST_STM32_PWM_40000400_PWM_LABEL #define DT_PWM_STM32_3_PRESCALER DT_ST_STM32_PWM_40000400_PWM_ST_PRESCALER +/* there is no reference to GPIOE, GPIOG and GPIOH in the dts files */ + +#define DT_GPIO_STM32_GPIOA_BASE_ADDRESS DT_ST_STM32_GPIO_50000000_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOA_CLOCK_BITS_0 DT_ST_STM32_GPIO_50000000_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOA_CLOCK_BUS_0 DT_ST_STM32_GPIO_50000000_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOA_CLOCK_CONTROLLER DT_ST_STM32_GPIO_50000000_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOA_LABEL DT_ST_STM32_GPIO_50000000_LABEL +#define DT_GPIO_STM32_GPIOA_SIZE DT_ST_STM32_GPIO_50000000_SIZE +#define DT_GPIO_STM32_GPIOA_CLOCK_BITS DT_ST_STM32_GPIO_50000000_CLOCK_BITS +#define DT_GPIO_STM32_GPIOA_CLOCK_BUS DT_ST_STM32_GPIO_50000000_CLOCK_BUS + +#define DT_GPIO_STM32_GPIOB_BASE_ADDRESS DT_ST_STM32_GPIO_50000400_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOB_CLOCK_BITS_0 DT_ST_STM32_GPIO_50000400_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOB_CLOCK_BUS_0 DT_ST_STM32_GPIO_50000400_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOB_CLOCK_CONTROLLER DT_ST_STM32_GPIO_50000400_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOB_LABEL DT_ST_STM32_GPIO_50000400_LABEL +#define DT_GPIO_STM32_GPIOB_SIZE DT_ST_STM32_GPIO_50000400_SIZE +#define DT_GPIO_STM32_GPIOB_CLOCK_BITS DT_ST_STM32_GPIO_50000400_CLOCK_BITS +#define DT_GPIO_STM32_GPIOB_CLOCK_BUS DT_ST_STM32_GPIO_50000400_CLOCK_BUS + +#define DT_GPIO_STM32_GPIOC_BASE_ADDRESS DT_ST_STM32_GPIO_50000800_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOC_CLOCK_BITS_0 DT_ST_STM32_GPIO_50000800_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOC_CLOCK_BUS_0 DT_ST_STM32_GPIO_50000800_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOC_CLOCK_CONTROLLER DT_ST_STM32_GPIO_50000800_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOC_LABEL DT_ST_STM32_GPIO_50000800_LABEL +#define DT_GPIO_STM32_GPIOC_SIZE DT_ST_STM32_GPIO_50000800_SIZE +#define DT_GPIO_STM32_GPIOC_CLOCK_BITS DT_ST_STM32_GPIO_50000800_CLOCK_BITS +#define DT_GPIO_STM32_GPIOC_CLOCK_BUS DT_ST_STM32_GPIO_50000800_CLOCK_BUS + +#define DT_GPIO_STM32_GPIOD_BASE_ADDRESS DT_ST_STM32_GPIO_50000C00_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOD_CLOCK_BITS_0 DT_ST_STM32_GPIO_50000C00_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOD_CLOCK_BUS_0 DT_ST_STM32_GPIO_50000C00_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOD_CLOCK_CONTROLLER DT_ST_STM32_GPIO_50000C00_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOD_LABEL DT_ST_STM32_GPIO_50000C00_LABEL +#define DT_GPIO_STM32_GPIOD_SIZE DT_ST_STM32_GPIO_50000C00_SIZE +#define DT_GPIO_STM32_GPIOD_CLOCK_BITS DT_ST_STM32_GPIO_50000C00_CLOCK_BITS +#define DT_GPIO_STM32_GPIOD_CLOCK_BUS DT_ST_STM32_GPIO_50000C00_CLOCK_BUS + +#define DT_GPIO_STM32_GPIOF_BASE_ADDRESS DT_ST_STM32_GPIO_50001400_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOF_CLOCK_BITS_0 DT_ST_STM32_GPIO_50001400_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOF_CLOCK_BUS_0 DT_ST_STM32_GPIO_50001400_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOF_CLOCK_CONTROLLER DT_ST_STM32_GPIO_50001400_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOF_LABEL DT_ST_STM32_GPIO_50001400_LABEL +#define DT_GPIO_STM32_GPIOF_SIZE DT_ST_STM32_GPIO_50001400_SIZE +#define DT_GPIO_STM32_GPIOF_CLOCK_BITS DT_ST_STM32_GPIO_50001400_CLOCK_BITS +#define DT_GPIO_STM32_GPIOF_CLOCK_BUS DT_ST_STM32_GPIO_50001400_CLOCK_BUS + /* End of SoC Level DTS fixup file */ diff --git a/soc/arm/st_stm32/stm32g0/soc.h b/soc/arm/st_stm32/stm32g0/soc.h index 021abd1de98..4e34056b14a 100644 --- a/soc/arm/st_stm32/stm32g0/soc.h +++ b/soc/arm/st_stm32/stm32g0/soc.h @@ -36,6 +36,10 @@ #include #endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */ +#ifdef CONFIG_GPIO_STM32 +#include +#endif + #endif /* !_ASMLANGUAGE */ #endif /* _STM32G0_SOC_H_ */