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drivers: gpio: imx rt11xx: fix wrong gpio pull disable mask

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Fixes: #75390
A wrong bit mask (wrong: IOMUXC_SW_PAD_CTL_PAD_PUS_MASK = 0x8) was used.
That bit mask is for PUE/PUS-type gpio registers, but this is the
section for registers with alternative PULL (PDRV) type layout.
Right bit mask: IOMUXC_SW_PAD_CTL_PAD_PULL_MASK

Signed-off-by: Nils Larsen <nils.larsen@posteo.de>
This commit is contained in:
Nils Larsen 2024-07-02 17:02:48 +02:00 • committed by Alberto Escolar
commit dcfc3e7872
1 changed files with 1 additions and 1 deletions
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2
drivers/gpio/gpio_mcux_igpio.c
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@ -124,7 +124,7 @@ static int mcux_igpio_configure(const struct device *dev,
}
} else {
/* Set pin to no pull */
reg |= IOMUXC_SW_PAD_CTL_PAD_PUS_MASK;
reg |= IOMUXC_SW_PAD_CTL_PAD_PULL_MASK;
}
/* PDRV/SNVS/LPSR reg have different ODE bits */
if (config->pin_muxes[cfg_idx].pdrv_mux) {