diff --git a/boards/arm/mimxrt1010_evk/CMakeLists.txt b/boards/arm/mimxrt1010_evk/CMakeLists.txt
index f904846c178..95ff65f4cd2 100644
--- a/boards/arm/mimxrt1010_evk/CMakeLists.txt
+++ b/boards/arm/mimxrt1010_evk/CMakeLists.txt
@@ -4,9 +4,10 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
+zephyr_library()
+zephyr_library_sources(init.c)
 
 if(CONFIG_NXP_IMX_RT_BOOT_HEADER)
-  zephyr_library()
   if(NOT DEFINED CONFIG_BOARD_MIMXRT1010_EVK)
     message(WARNING "It appears you are using the board definition for "
      "the MIMXRT1010-EVK, but targeting a custom board. You may need to "
diff --git a/boards/arm/mimxrt1010_evk/init.c b/boards/arm/mimxrt1010_evk/init.c
new file mode 100644
index 00000000000..1e62f4b5a6b
--- /dev/null
+++ b/boards/arm/mimxrt1010_evk/init.c
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2022 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+ #include <soc.h>
+
+void SystemInitHook(void)
+{
+#ifdef CONFIG_CODE_FLEXSPI
+	/* AT25SF128A SPI Flash on the RT1010-EVK requires special alignment
+	 * considerations, so set the READADDROPT bit in the FlexSPI so it
+	 * will fetch more data than each AHB burst requires to meet alignment
+	 * requirements
+	 *
+	 * Without this, the FlexSPI will return corrupted data during early
+	 * boot, causing a hardfault. This can also be resolved by enabling
+	 * the instruction cache in very early boot.
+	 */
+	FLEXSPI->AHBCR |= FLEXSPI_AHBCR_READADDROPT_MASK;
+#endif /* CONFIG_CODE_FLEXSPI */
+}