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arm/atmel_sam3: add PDC register struct

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Adds the struct to describe PDC (Peripheral DMA Controller).
The PDC is being used by peripherals to initiate DMA
transfers.

Change-Id: Ida2a20810c4f2ef972e9669c45e22da07c1576ab
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2016-02-03 13:28:31 -08:00 • committed by Anas Nashif
commit dc8ddfcd1d
2 changed files with 26 additions and 0 deletions
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6
arch/arm/soc/atmel_sam3/soc.h
View file

@ -183,6 +183,12 @@
#define EEFC_BANK0_ADDR 0x400E0A00
#define EEFC_BANK1_ADDR 0x400E0C00
/* Peripheral DMA Controller (PDC) */
#define PDC_PTCR_RXTEN (1 << 0)
#define PDC_PTCR_RXTDIS (1 << 1)
#define PDC_PTCR_TXTEN (1 << 8)
#define PDC_PTCR_TXTDIS (1 << 9)
/* PIO Controllers */
#define PIOA_ADDR 0x400E0E00
#define PIOB_ADDR 0x400E1000

20
arch/arm/soc/atmel_sam3/soc_registers.h
View file

@ -23,6 +23,26 @@
#ifndef _ATMEL_SAM3_SOC_REGS_H_
#define _ATMEL_SAM3_SOC_REGS_H_
/* Peripheral DMA Controller
*
* DO NOT USE DIRECTLY! This is to be used within individual
* peripheral's register struct.
*
* Starts at offset 0x100.
*/
struct __pdc {
uint32_t rpr; /* 0x100 Receive Pointer */
uint32_t rcr; /* 0x104 Receive Counter */
uint32_t tpr; /* 0x108 Transmit Pointer */
uint32_t tcr; /* 0x10C Transmit Counter */
uint32_t rnpr; /* 0x110 Receive Next Pointer */
uint32_t rncr; /* 0x114 Receive Next Counter */
uint32_t tnpr; /* 0x118 Transmit Next Pointer */
uint32_t tncr; /* 0x11C Transmit Next Counter */
uint32_t ptcr; /* 0x120 Transfer Control */
uint32_t ptsr; /* 0x124 Transfer Status */
};
/* Enhanced Embedded Flash Controller */
struct __eefc {
uint32_t fmr; /* 0x00 Flash Mode Register */