x86: cache: Use new cache APIs
Add an helper to correctly use the new cache APIs. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
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3 changed files with 29 additions and 32 deletions
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@ -140,7 +140,7 @@ config LAZY_FPU_SHARING
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endmenu
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config CACHE_LINE_SIZE
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config DCACHE_LINE_SIZE
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default 64 if CPU_ATOM
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config CLFLUSH_INSTRUCTION_SUPPORTED
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@ -26,23 +26,13 @@ extern int z_is_clflush_available(void);
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extern void z_cache_flush_wbinvd(vaddr_t addr, size_t len);
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extern size_t z_cache_line_size_get(void);
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#if defined(CONFIG_CACHE_LINE_SIZE_DETECT)
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#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
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size_t sys_cache_line_size;
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#endif
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#if defined(CONFIG_CLFLUSH_INSTRUCTION_SUPPORTED) || \
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defined(CONFIG_CLFLUSH_DETECT)
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#if (CONFIG_CACHE_LINE_SIZE == 0) && !defined(CONFIG_CACHE_LINE_SIZE_DETECT)
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#error Cannot use this implementation with a cache line size of 0
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#endif
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#if defined(CONFIG_CACHE_LINE_SIZE_DETECT)
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#define DCACHE_LINE_SIZE sys_cache_line_size
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#else
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#define DCACHE_LINE_SIZE CONFIG_CACHE_LINE_SIZE
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#endif
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/**
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*
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* @brief Flush cache lines to main memory
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@ -51,59 +41,66 @@ size_t sys_cache_line_size;
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* sys_cache_flush() iterates on the cache lines, a cache line alignment for
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* both is optimal.
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*
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* The cache line size is specified either via the CONFIG_CACHE_LINE_SIZE
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* The cache line size is specified either via the CONFIG_DCACHE_LINE_SIZE
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* kconfig option or it is detected at runtime.
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*
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* @return N/A
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*/
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void arch_dcache_flush(void *start_addr, size_t size)
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static void arch_dcache_flush(void *start_addr, size_t size)
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{
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size_t line_size = sys_dcache_line_size_get();
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uintptr_t start = (uintptr_t)start_addr;
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uintptr_t end;
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size = ROUND_UP(size, DCACHE_LINE_SIZE);
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if (line_size == 0U) {
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return;
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}
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size = ROUND_UP(size, line_size);
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end = start + size;
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for (; start < end; start += DCACHE_LINE_SIZE) {
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for (; start < end; start += line_size) {
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__asm__ volatile("clflush %0;\n\t" : : "m"(start));
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}
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__asm__ volatile("mfence;\n\t");
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}
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#endif /* CONFIG_CLFLUSH_INSTRUCTION_SUPPORTED || CLFLUSH_DETECT */
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int arch_dcache_range(void *addr, size_t size, int op)
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{
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if (op & K_CACHE_WB) {
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arch_dcache_flush(addr, size);
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return 0;
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}
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#if defined(CONFIG_CLFLUSH_DETECT) || defined(CONFIG_CACHE_LINE_SIZE_DETECT)
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return -ENOTSUP;
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}
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#endif /* CONFIG_CLFLUSH_INSTRUCTION_SUPPORTED || CLFLUSH_DETECT */
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#include <init.h>
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#if defined(CONFIG_CACHE_LINE_SIZE_DETECT)
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#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
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static void init_cache_line_size(void)
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{
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sys_cache_line_size = z_cache_line_size_get();
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}
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#endif
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size_t arch_cache_line_size_get(void)
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{
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#if defined(CONFIG_CACHE_LINE_SIZE_DETECT)
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return sys_cache_line_size;
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#else
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return 0;
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#endif
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}
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#endif
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static int init_cache(const struct device *unused)
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static int init_dcache(const struct device *unused)
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{
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ARG_UNUSED(unused);
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#if defined(CONFIG_CACHE_LINE_SIZE_DETECT)
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init_cache_line_size();
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#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
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init_cache_line_size();
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#endif
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return 0;
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}
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SYS_INIT(init_cache, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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#endif /* CONFIG_CLFLUSH_DETECT || CONFIG_CACHE_LINE_SIZE_DETECT */
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SYS_INIT(init_dcache, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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@ -58,7 +58,7 @@ SECTION_FUNC(TEXT, CACHE_FLUSH_NAME)
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#endif /* !CONFIG_CLFLUSH_INSTRUCTION_SUPPORTED */
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#if defined(CONFIG_CACHE_LINE_SIZE_DETECT)
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#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
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#define CPUID_CACHE_LINE_MASK (0xff << 8)
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@ -75,4 +75,4 @@ SECTION_FUNC(TEXT, z_cache_line_size_get)
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popl %ebx
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ret
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#endif /* CONFIG_CACHE_LINE_SIZE_DETECT */
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#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT */
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