diff --git a/dts/arm/cortex_r8_virt.dtsi b/dts/arm/cortex_r8_virt.dtsi new file mode 100644 index 00000000000..704f17ed8ef --- /dev/null +++ b/dts/arm/cortex_r8_virt.dtsi @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2024 Antmicro + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-r8f"; + reg = <0>; + }; + }; + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + interrupt-parent = < &gic >; + flash0: flash@c0000000 { + compatible = "soc-nv-flash"; + reg = < 0xc0000000 0x2000000 >; + }; + sram0: memory@0 { + compatible = "mmio-sram"; + reg = < 0x0 0x4000000 >; + }; + uart0: uart@ff000000 { + compatible = "xlnx,xuartps"; + reg = < 0xff000000 0x4c >; + status = "disabled"; + interrupts = ; + interrupt-names = "irq_0"; + }; + ttc0: timer@ff110000 { + compatible = "xlnx,ttcps"; + status = "okay"; + interrupts = < 0x0 0x24 0x2 0xa0 >, + < 0x0 0x25 0x2 0xa0 >, + < 0x0 0x26 0x2 0xa0 >; + interrupt-names = "irq_0", "irq_1", "irq_2"; + reg = < 0xff110000 0x1000 >; + clock-frequency = < 5000000 >; + }; + gic: interrupt-controller@f9000000 { + compatible = "arm,gic-v1", "arm,gic"; + reg = < 0xf9000000 0x1000 >, < 0xf9001000 0x100 >; + interrupt-controller; + #interrupt-cells = < 0x4 >; + status = "okay"; + phandle = < 0x1 >; + }; + }; +}; diff --git a/soc/renode/cortex_r8_virtual/CMakeLists.txt b/soc/renode/cortex_r8_virtual/CMakeLists.txt new file mode 100644 index 00000000000..2b8f495b04e --- /dev/null +++ b/soc/renode/cortex_r8_virtual/CMakeLists.txt @@ -0,0 +1,13 @@ +# Copyright (c) 2024 Antmicro +# SPDX-License-Identifier: Apache-2.0 + +zephyr_sources(soc.c) + +zephyr_sources_ifdef( + CONFIG_ARM_MPU + arm_mpu_regions.c +) + +zephyr_include_directories(.) + +set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_a_r/scripts/linker.ld CACHE INTERNAL "") diff --git a/soc/renode/cortex_r8_virtual/Kconfig b/soc/renode/cortex_r8_virtual/Kconfig new file mode 100644 index 00000000000..769ee5e4af8 --- /dev/null +++ b/soc/renode/cortex_r8_virtual/Kconfig @@ -0,0 +1,9 @@ +# Copyright (c) 2024 Antmicro +# SPDX-License-Identifier: Apache-2.0 + +config SOC_CORTEX_R8_VIRTUAL + select ARM + select CPU_CORTEX_R8 + select PLATFORM_SPECIFIC_INIT + select CPU_HAS_ARM_MPU + select VFP_DP_D16 diff --git a/soc/renode/cortex_r8_virtual/Kconfig.defconfig b/soc/renode/cortex_r8_virtual/Kconfig.defconfig new file mode 100644 index 00000000000..114978755a9 --- /dev/null +++ b/soc/renode/cortex_r8_virtual/Kconfig.defconfig @@ -0,0 +1,20 @@ +# Copyright (c) 2024 Antmicro +# SPDX-License-Identifier: Apache-2.0 + +if SOC_CORTEX_R8_VIRTUAL + +config NUM_IRQS + default 220 + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 5000000 + +DT_CHOSEN_Z_FLASH := zephyr,flash + +config FLASH_SIZE + default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K) + +config FLASH_BASE_ADDRESS + default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH)) + +endif # SOC_CORTEX_R8_VIRTUAL diff --git a/soc/renode/cortex_r8_virtual/Kconfig.soc b/soc/renode/cortex_r8_virtual/Kconfig.soc new file mode 100644 index 00000000000..c326279f27b --- /dev/null +++ b/soc/renode/cortex_r8_virtual/Kconfig.soc @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Antmicro +# SPDX-License-Identifier: Apache-2.0 + +config SOC_CORTEX_R8_VIRTUAL + bool + help + Cortex R8 Virtual system implementation + +config SOC + default "cortex_r8_virtual" if SOC_CORTEX_R8_VIRTUAL diff --git a/soc/renode/cortex_r8_virtual/arm_mpu_regions.c b/soc/renode/cortex_r8_virtual/arm_mpu_regions.c new file mode 100644 index 00000000000..8287a0651d4 --- /dev/null +++ b/soc/renode/cortex_r8_virtual/arm_mpu_regions.c @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2021 Lexmark International, Inc. + * Copyright (c) 2024 Antmicro + */ + +#include +#include + +#define MPUTYPE_READ_ONLY \ + { \ + .rasr = (P_RO_U_RO_Msk \ + | (7 << MPU_RASR_TEX_Pos) \ + | MPU_RASR_C_Msk \ + | MPU_RASR_B_Msk \ + | MPU_RASR_XN_Msk) \ + } + +#define MPUTYPE_READ_ONLY_PRIV \ + { \ + .rasr = (P_RO_U_RO_Msk \ + | (5 << MPU_RASR_TEX_Pos) \ + | MPU_RASR_B_Msk) \ + } + +#define MPUTYPE_PRIV_WBWACACHE_XN \ + { \ + .rasr = (P_RW_U_NA_Msk \ + | (5 << MPU_RASR_TEX_Pos) \ + | MPU_RASR_B_Msk \ + | MPU_RASR_XN_Msk) \ + } + +#define MPUTYPE_PRIV_DEVICE \ + { \ + .rasr = (P_RW_U_NA_Msk \ + | (2 << MPU_RASR_TEX_Pos)) \ + } + +extern uint32_t _image_rom_end_order; +static const struct arm_mpu_region mpu_regions[] = { + MPU_REGION_ENTRY("FLASH0", + 0xc0000000, + REGION_32M, + MPUTYPE_READ_ONLY), + + MPU_REGION_ENTRY("SRAM_PRIV", + 0x00000000, + REGION_2G, + MPUTYPE_PRIV_WBWACACHE_XN), + + MPU_REGION_ENTRY("SRAM", + 0x00000000, + ((uint32_t)&_image_rom_end_order), + MPUTYPE_READ_ONLY_PRIV), + + MPU_REGION_ENTRY("REGISTERS", + 0xf8000000, + REGION_128M, + MPUTYPE_PRIV_DEVICE), +}; + +const struct arm_mpu_config mpu_config = { + .num_regions = ARRAY_SIZE(mpu_regions), + .mpu_regions = mpu_regions, +}; diff --git a/soc/renode/cortex_r8_virtual/soc.c b/soc/renode/cortex_r8_virtual/soc.c new file mode 100644 index 00000000000..b5ec39c8108 --- /dev/null +++ b/soc/renode/cortex_r8_virtual/soc.c @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2019 Lexmark International, Inc. + * Copyright (c) 2024 Antmicro + * + * SPDX-License-Identifier: Apache-2.0 + * + */ + +#include +#include + +#include + +void z_arm_platform_init(void) +{ + /* + * Use normal exception vectors address range (0x0-0x1C). + */ + unsigned int sctlr = __get_SCTLR(); + + sctlr &= ~SCTLR_V_Msk; + __set_SCTLR(sctlr); +} diff --git a/soc/renode/cortex_r8_virtual/soc.h b/soc/renode/cortex_r8_virtual/soc.h new file mode 100644 index 00000000000..952a91d5e3f --- /dev/null +++ b/soc/renode/cortex_r8_virtual/soc.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2024 Antmicro + * + * SPDX-License-Identifier: Apache-2.0 + * + */ + +#ifndef ZEPHYR_SOC_CORTEX_R8_VIRTUAL_SOC_H_ +#define ZEPHYR_SOC_CORTEX_R8_VIRTUAL_SOC_H_ + +#define __CR_REV 1U + +#define __GIC_PRESENT 0U +#define __TIM_PRESENT 0U + +#endif /* ZEPHYR_SOC_CORTEX_R8_VIRTUAL_SOC_H_ */ diff --git a/soc/renode/cortex_r8_virtual/soc.yml b/soc/renode/cortex_r8_virtual/soc.yml new file mode 100644 index 00000000000..8d0a0b279da --- /dev/null +++ b/soc/renode/cortex_r8_virtual/soc.yml @@ -0,0 +1,2 @@ +socs: + - name: cortex_r8_virtual