Xtensa port: Added support for Xtensa architecture in zephyr include files.

Change-Id: I1ac677cd6da5222707fe31ead71dc354f7c94443
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
This commit is contained in:
Mazen NEIFER 2017-01-22 17:20:22 +01:00 committed by Andrew Boie
commit dc391f566c
2 changed files with 2 additions and 2 deletions

View file

@ -2972,7 +2972,7 @@ __asm__(".macro _build_mem_pool name, min_size, max_size, n_max\n\t"
static void __attribute__ ((used)) __k_mem_pool_quad_block_size_define(void)
{
__asm__(".globl __memory_pool_quad_block_size\n\t"
#ifdef CONFIG_NIOS2
#if defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
"__memory_pool_quad_block_size = %0\n\t"
#else
"__memory_pool_quad_block_size = %c0\n\t"