diff --git a/boards/arm/96b_argonkey/96b_argonkey.dts b/boards/arm/96b_argonkey/96b_argonkey.dts index 9b65d0e367b..1828e12def2 100644 --- a/boards/arm/96b_argonkey/96b_argonkey.dts +++ b/boards/arm/96b_argonkey/96b_argonkey.dts @@ -47,6 +47,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -161,5 +165,7 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/96b_carbon/96b_carbon.dts b/boards/arm/96b_carbon/96b_carbon.dts index d513ecd7705..749edff0721 100644 --- a/boards/arm/96b_carbon/96b_carbon.dts +++ b/boards/arm/96b_carbon/96b_carbon.dts @@ -53,6 +53,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -175,5 +179,7 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/96b_neonkey/96b_neonkey.dts b/boards/arm/96b_neonkey/96b_neonkey.dts index 8ec62807e51..df65000ebf5 100644 --- a/boards/arm/96b_neonkey/96b_neonkey.dts +++ b/boards/arm/96b_neonkey/96b_neonkey.dts @@ -56,6 +56,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -117,5 +121,7 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts b/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts index 4b0dd4bee95..dd629a29476 100644 --- a/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts +++ b/boards/arm/96b_stm32_sensor_mez/96b_stm32_sensor_mez.dts @@ -51,6 +51,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -205,5 +209,7 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/96b_wistrio/96b_wistrio.dts b/boards/arm/96b_wistrio/96b_wistrio.dts index 3485d4ce810..37bedcf3ab1 100644 --- a/boards/arm/96b_wistrio/96b_wistrio.dts +++ b/boards/arm/96b_wistrio/96b_wistrio.dts @@ -55,6 +55,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -120,6 +124,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/adafruit_feather_stm32f405/adafruit_feather_stm32f405.dts b/boards/arm/adafruit_feather_stm32f405/adafruit_feather_stm32f405.dts index 399150ae263..356e804aaa3 100644 --- a/boards/arm/adafruit_feather_stm32f405/adafruit_feather_stm32f405.dts +++ b/boards/arm/adafruit_feather_stm32f405/adafruit_feather_stm32f405.dts @@ -35,6 +35,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -98,6 +102,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/b_l072z_lrwan1/b_l072z_lrwan1.dts b/boards/arm/b_l072z_lrwan1/b_l072z_lrwan1.dts index 0dc9afce28a..171001898fd 100644 --- a/boards/arm/b_l072z_lrwan1/b_l072z_lrwan1.dts +++ b/boards/arm/b_l072z_lrwan1/b_l072z_lrwan1.dts @@ -71,6 +71,10 @@ cpu-power-states = <&stop>; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -149,6 +153,8 @@ arduino_i2c: &i2c1 {}; }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/b_l4s5i_iot01a/b_l4s5i_iot01a.dts b/boards/arm/b_l4s5i_iot01a/b_l4s5i_iot01a.dts index ffe1b590298..60420f446f8 100644 --- a/boards/arm/b_l4s5i_iot01a/b_l4s5i_iot01a.dts +++ b/boards/arm/b_l4s5i_iot01a/b_l4s5i_iot01a.dts @@ -48,6 +48,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -206,6 +210,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/black_f407ve/black_f407ve.dts b/boards/arm/black_f407ve/black_f407ve.dts index 4e3b6c46deb..6586c74a920 100644 --- a/boards/arm/black_f407ve/black_f407ve.dts +++ b/boards/arm/black_f407ve/black_f407ve.dts @@ -57,6 +57,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -104,6 +108,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/black_f407zg_pro/black_f407zg_pro.dts b/boards/arm/black_f407zg_pro/black_f407zg_pro.dts index 791c5570ace..af72aae4ec8 100644 --- a/boards/arm/black_f407zg_pro/black_f407zg_pro.dts +++ b/boards/arm/black_f407zg_pro/black_f407zg_pro.dts @@ -56,6 +56,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -103,6 +107,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/blackpill_f401cc/blackpill_f401cc.dts b/boards/arm/blackpill_f401cc/blackpill_f401cc.dts index febfdbe0aa1..3b337531ad9 100644 --- a/boards/arm/blackpill_f401cc/blackpill_f401cc.dts +++ b/boards/arm/blackpill_f401cc/blackpill_f401cc.dts @@ -107,6 +107,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; @@ -122,6 +124,10 @@ zephyr_udc0: &usbotg_fs { status = "okay"; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; diff --git a/boards/arm/blackpill_f401ce/blackpill_f401ce.dts b/boards/arm/blackpill_f401ce/blackpill_f401ce.dts index 07860f84bd6..6c273677c13 100644 --- a/boards/arm/blackpill_f401ce/blackpill_f401ce.dts +++ b/boards/arm/blackpill_f401ce/blackpill_f401ce.dts @@ -107,6 +107,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; @@ -122,6 +124,10 @@ zephyr_udc0: &usbotg_fs { status = "okay"; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; diff --git a/boards/arm/blackpill_f411ce/blackpill_f411ce.dts b/boards/arm/blackpill_f411ce/blackpill_f411ce.dts index bca59b801a4..61f928295dd 100644 --- a/boards/arm/blackpill_f411ce/blackpill_f411ce.dts +++ b/boards/arm/blackpill_f411ce/blackpill_f411ce.dts @@ -108,6 +108,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; @@ -123,6 +125,10 @@ zephyr_udc0: &usbotg_fs { status = "okay"; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; diff --git a/boards/arm/disco_l475_iot1/disco_l475_iot1.dts b/boards/arm/disco_l475_iot1/disco_l475_iot1.dts index 9e611a25843..8a25b416a9e 100644 --- a/boards/arm/disco_l475_iot1/disco_l475_iot1.dts +++ b/boards/arm/disco_l475_iot1/disco_l475_iot1.dts @@ -78,6 +78,10 @@ cpu-power-states = <&stop0 &stop1 &stop2>; }; +&clk_lsi { + status = "okay"; +}; + &clk_lse { status = "okay"; }; @@ -250,6 +254,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/lora_e5_dev_board/lora_e5_dev_board.dts b/boards/arm/lora_e5_dev_board/lora_e5_dev_board.dts index c9f8644d29d..f537a3b591d 100644 --- a/boards/arm/lora_e5_dev_board/lora_e5_dev_board.dts +++ b/boards/arm/lora_e5_dev_board/lora_e5_dev_board.dts @@ -167,6 +167,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/mikroe_clicker_2/mikroe_clicker_2.dts b/boards/arm/mikroe_clicker_2/mikroe_clicker_2.dts index 6328327a1b5..7686adce064 100644 --- a/boards/arm/mikroe_clicker_2/mikroe_clicker_2.dts +++ b/boards/arm/mikroe_clicker_2/mikroe_clicker_2.dts @@ -52,6 +52,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -96,6 +100,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f031k6/nucleo_f031k6.dts b/boards/arm/nucleo_f031k6/nucleo_f031k6.dts index 76902ae56e4..1d74dbb4edd 100644 --- a/boards/arm/nucleo_f031k6/nucleo_f031k6.dts +++ b/boards/arm/nucleo_f031k6/nucleo_f031k6.dts @@ -40,6 +40,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -101,5 +105,7 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f091rc/nucleo_f091rc.dts b/boards/arm/nucleo_f091rc/nucleo_f091rc.dts index a02f3e9a71f..f14b3c6acb9 100644 --- a/boards/arm/nucleo_f091rc/nucleo_f091rc.dts +++ b/boards/arm/nucleo_f091rc/nucleo_f091rc.dts @@ -60,6 +60,10 @@ status = "okay"; }; +&clk_lsi { + status = "okay"; +}; + &pll { prediv = <1>; mul = <6>; @@ -118,6 +122,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f207zg/nucleo_f207zg.dts b/boards/arm/nucleo_f207zg/nucleo_f207zg.dts index 7230db74881..a5b4d4eb1f9 100644 --- a/boards/arm/nucleo_f207zg/nucleo_f207zg.dts +++ b/boards/arm/nucleo_f207zg/nucleo_f207zg.dts @@ -76,6 +76,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -138,6 +142,8 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f302r8/nucleo_f302r8.dts b/boards/arm/nucleo_f302r8/nucleo_f302r8.dts index 2479e7f613e..3875c82a03a 100644 --- a/boards/arm/nucleo_f302r8/nucleo_f302r8.dts +++ b/boards/arm/nucleo_f302r8/nucleo_f302r8.dts @@ -42,6 +42,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -107,6 +111,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f303k8/nucleo_f303k8.dts b/boards/arm/nucleo_f303k8/nucleo_f303k8.dts index a949f9e3dd5..0fd2c635f55 100644 --- a/boards/arm/nucleo_f303k8/nucleo_f303k8.dts +++ b/boards/arm/nucleo_f303k8/nucleo_f303k8.dts @@ -40,6 +40,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -97,5 +101,7 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f303re/nucleo_f303re.dts b/boards/arm/nucleo_f303re/nucleo_f303re.dts index 2b0a2a35555..e8888eabc32 100644 --- a/boards/arm/nucleo_f303re/nucleo_f303re.dts +++ b/boards/arm/nucleo_f303re/nucleo_f303re.dts @@ -43,6 +43,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -79,6 +83,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f334r8/nucleo_f334r8.dts b/boards/arm/nucleo_f334r8/nucleo_f334r8.dts index bf226c2d192..e8be87eae74 100644 --- a/boards/arm/nucleo_f334r8/nucleo_f334r8.dts +++ b/boards/arm/nucleo_f334r8/nucleo_f334r8.dts @@ -43,6 +43,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -110,6 +114,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f401re/nucleo_f401re.dts b/boards/arm/nucleo_f401re/nucleo_f401re.dts index 5c98a7083ae..5e7089d053f 100644 --- a/boards/arm/nucleo_f401re/nucleo_f401re.dts +++ b/boards/arm/nucleo_f401re/nucleo_f401re.dts @@ -53,6 +53,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -155,6 +159,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f410rb/nucleo_f410rb.dts b/boards/arm/nucleo_f410rb/nucleo_f410rb.dts index ef3ded8fd59..65a27b46b58 100644 --- a/boards/arm/nucleo_f410rb/nucleo_f410rb.dts +++ b/boards/arm/nucleo_f410rb/nucleo_f410rb.dts @@ -42,6 +42,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -101,6 +105,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f411re/nucleo_f411re.dts b/boards/arm/nucleo_f411re/nucleo_f411re.dts index 3b4605c0fd2..dd5112862a0 100644 --- a/boards/arm/nucleo_f411re/nucleo_f411re.dts +++ b/boards/arm/nucleo_f411re/nucleo_f411re.dts @@ -42,6 +42,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -111,5 +115,7 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f412zg/nucleo_f412zg.dts b/boards/arm/nucleo_f412zg/nucleo_f412zg.dts index 2d24758dfaf..efd04013e63 100644 --- a/boards/arm/nucleo_f412zg/nucleo_f412zg.dts +++ b/boards/arm/nucleo_f412zg/nucleo_f412zg.dts @@ -52,6 +52,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -120,5 +124,7 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f413zh/nucleo_f413zh.dts b/boards/arm/nucleo_f413zh/nucleo_f413zh.dts index d944b6ba3a1..4ce1740cb77 100644 --- a/boards/arm/nucleo_f413zh/nucleo_f413zh.dts +++ b/boards/arm/nucleo_f413zh/nucleo_f413zh.dts @@ -52,6 +52,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -120,5 +124,7 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f429zi/nucleo_f429zi.dts b/boards/arm/nucleo_f429zi/nucleo_f429zi.dts index e9ddf4cd91c..b3d1df05a3b 100644 --- a/boards/arm/nucleo_f429zi/nucleo_f429zi.dts +++ b/boards/arm/nucleo_f429zi/nucleo_f429zi.dts @@ -55,6 +55,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -139,6 +143,8 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f446re/nucleo_f446re.dts b/boards/arm/nucleo_f446re/nucleo_f446re.dts index 8221b5afc59..ce5dc151228 100644 --- a/boards/arm/nucleo_f446re/nucleo_f446re.dts +++ b/boards/arm/nucleo_f446re/nucleo_f446re.dts @@ -43,6 +43,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -109,6 +113,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f446ze/nucleo_f446ze.dts b/boards/arm/nucleo_f446ze/nucleo_f446ze.dts index d6716229a03..6b7c02915ec 100644 --- a/boards/arm/nucleo_f446ze/nucleo_f446ze.dts +++ b/boards/arm/nucleo_f446ze/nucleo_f446ze.dts @@ -53,6 +53,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -158,6 +162,8 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f746zg/nucleo_f746zg.dts b/boards/arm/nucleo_f746zg/nucleo_f746zg.dts index d0ee1e90abf..1674f0de74e 100644 --- a/boards/arm/nucleo_f746zg/nucleo_f746zg.dts +++ b/boards/arm/nucleo_f746zg/nucleo_f746zg.dts @@ -62,6 +62,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -142,6 +146,8 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_f767zi/nucleo_f767zi.dts b/boards/arm/nucleo_f767zi/nucleo_f767zi.dts index 4c7b6f4a108..f32c0b648a7 100644 --- a/boards/arm/nucleo_f767zi/nucleo_f767zi.dts +++ b/boards/arm/nucleo_f767zi/nucleo_f767zi.dts @@ -63,6 +63,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -149,6 +153,8 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_g071rb/nucleo_g071rb.dts b/boards/arm/nucleo_g071rb/nucleo_g071rb.dts index 4827894eac3..35da009f22d 100644 --- a/boards/arm/nucleo_g071rb/nucleo_g071rb.dts +++ b/boards/arm/nucleo_g071rb/nucleo_g071rb.dts @@ -99,6 +99,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_g0b1re/nucleo_g0b1re.dts b/boards/arm/nucleo_g0b1re/nucleo_g0b1re.dts index f82898e4ff0..0317f52ca76 100644 --- a/boards/arm/nucleo_g0b1re/nucleo_g0b1re.dts +++ b/boards/arm/nucleo_g0b1re/nucleo_g0b1re.dts @@ -106,6 +106,8 @@ zephyr_udc0: &usb { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_g431rb/nucleo_g431rb.dts b/boards/arm/nucleo_g431rb/nucleo_g431rb.dts index 10af09c5b8c..18a66635632 100644 --- a/boards/arm/nucleo_g431rb/nucleo_g431rb.dts +++ b/boards/arm/nucleo_g431rb/nucleo_g431rb.dts @@ -52,6 +52,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -128,6 +132,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_g474re/nucleo_g474re.dts b/boards/arm/nucleo_g474re/nucleo_g474re.dts index f69bfc4a77e..6ae3833740d 100644 --- a/boards/arm/nucleo_g474re/nucleo_g474re.dts +++ b/boards/arm/nucleo_g474re/nucleo_g474re.dts @@ -53,6 +53,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -139,6 +143,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_h723zg/nucleo_h723zg.dts b/boards/arm/nucleo_h723zg/nucleo_h723zg.dts index d0b1ce59919..85af8c2fc88 100644 --- a/boards/arm/nucleo_h723zg/nucleo_h723zg.dts +++ b/boards/arm/nucleo_h723zg/nucleo_h723zg.dts @@ -62,6 +62,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -108,6 +112,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_h743zi/nucleo_h743zi.dts b/boards/arm/nucleo_h743zi/nucleo_h743zi.dts index 7909b1715cd..f94bf74e00e 100644 --- a/boards/arm/nucleo_h743zi/nucleo_h743zi.dts +++ b/boards/arm/nucleo_h743zi/nucleo_h743zi.dts @@ -60,6 +60,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -101,6 +105,8 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_h745zi_q/nucleo_h745zi_q_m7.dts b/boards/arm/nucleo_h745zi_q/nucleo_h745zi_q_m7.dts index 4bc8c60cdb2..82a3a1f1fec 100644 --- a/boards/arm/nucleo_h745zi_q/nucleo_h745zi_q_m7.dts +++ b/boards/arm/nucleo_h745zi_q/nucleo_h745zi_q_m7.dts @@ -45,6 +45,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -74,6 +78,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_h753zi/nucleo_h753zi.dts b/boards/arm/nucleo_h753zi/nucleo_h753zi.dts index ae8938b338d..e0d20e966e4 100644 --- a/boards/arm/nucleo_h753zi/nucleo_h753zi.dts +++ b/boards/arm/nucleo_h753zi/nucleo_h753zi.dts @@ -59,6 +59,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -100,6 +104,8 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_l152re/nucleo_l152re.dts b/boards/arm/nucleo_l152re/nucleo_l152re.dts index ffdf32b47e0..0ad6825eed0 100644 --- a/boards/arm/nucleo_l152re/nucleo_l152re.dts +++ b/boards/arm/nucleo_l152re/nucleo_l152re.dts @@ -44,6 +44,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -85,6 +89,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_l412rb_p/nucleo_l412rb_p.dts b/boards/arm/nucleo_l412rb_p/nucleo_l412rb_p.dts index a942782fb09..be96ea655cc 100644 --- a/boards/arm/nucleo_l412rb_p/nucleo_l412rb_p.dts +++ b/boards/arm/nucleo_l412rb_p/nucleo_l412rb_p.dts @@ -42,6 +42,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -101,6 +105,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_l432kc/nucleo_l432kc.dts b/boards/arm/nucleo_l432kc/nucleo_l432kc.dts index 240faf6a1ae..07120823b4e 100644 --- a/boards/arm/nucleo_l432kc/nucleo_l432kc.dts +++ b/boards/arm/nucleo_l432kc/nucleo_l432kc.dts @@ -33,6 +33,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -100,6 +104,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_l433rc_p/nucleo_l433rc_p.dts b/boards/arm/nucleo_l433rc_p/nucleo_l433rc_p.dts index 7ef33bd1b5e..7c6abddfd99 100644 --- a/boards/arm/nucleo_l433rc_p/nucleo_l433rc_p.dts +++ b/boards/arm/nucleo_l433rc_p/nucleo_l433rc_p.dts @@ -43,6 +43,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -117,6 +121,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_l452re/nucleo_l452re_common.dtsi b/boards/arm/nucleo_l452re/nucleo_l452re_common.dtsi index b998101a531..920bb94cbea 100644 --- a/boards/arm/nucleo_l452re/nucleo_l452re_common.dtsi +++ b/boards/arm/nucleo_l452re/nucleo_l452re_common.dtsi @@ -34,6 +34,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -101,6 +105,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_l476rg/nucleo_l476rg.dts b/boards/arm/nucleo_l476rg/nucleo_l476rg.dts index b1cfc15e091..b77274b7b59 100644 --- a/boards/arm/nucleo_l476rg/nucleo_l476rg.dts +++ b/boards/arm/nucleo_l476rg/nucleo_l476rg.dts @@ -67,6 +67,10 @@ status = "okay"; }; +&clk_lse { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -175,6 +179,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_l496zg/nucleo_l496zg.dts b/boards/arm/nucleo_l496zg/nucleo_l496zg.dts index a4589731de3..4397605ad6f 100644 --- a/boards/arm/nucleo_l496zg/nucleo_l496zg.dts +++ b/boards/arm/nucleo_l496zg/nucleo_l496zg.dts @@ -62,6 +62,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -154,6 +158,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_l4r5zi/nucleo_l4r5zi.dts b/boards/arm/nucleo_l4r5zi/nucleo_l4r5zi.dts index 6a241381092..617eada11e1 100644 --- a/boards/arm/nucleo_l4r5zi/nucleo_l4r5zi.dts +++ b/boards/arm/nucleo_l4r5zi/nucleo_l4r5zi.dts @@ -66,6 +66,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -172,6 +176,8 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts b/boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts index 3f5eda3b4bc..e0b2c7d7195 100644 --- a/boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts +++ b/boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts @@ -89,6 +89,10 @@ status = "okay"; }; +&clk_lsi1 { + status = "okay"; +}; + &clk_hse { status = "okay"; }; @@ -133,6 +137,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit.dts b/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit.dts index 38cfa4eb1e3..34b7edf937d 100644 --- a/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit.dts +++ b/boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit.dts @@ -137,6 +137,8 @@ uext_spi: &spi1 { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/olimex_stm32_e407/olimex_stm32_e407.dts b/boards/arm/olimex_stm32_e407/olimex_stm32_e407.dts index 5c611193fdf..b2e1dd286d4 100644 --- a/boards/arm/olimex_stm32_e407/olimex_stm32_e407.dts +++ b/boards/arm/olimex_stm32_e407/olimex_stm32_e407.dts @@ -42,6 +42,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -86,6 +90,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/olimex_stm32_h405/olimex_stm32_h405.dts b/boards/arm/olimex_stm32_h405/olimex_stm32_h405.dts index 594a51d59de..1a13a8e2e69 100644 --- a/boards/arm/olimex_stm32_h405/olimex_stm32_h405.dts +++ b/boards/arm/olimex_stm32_h405/olimex_stm32_h405.dts @@ -43,6 +43,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -73,6 +77,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/olimex_stm32_h407/olimex_stm32_h407.dts b/boards/arm/olimex_stm32_h407/olimex_stm32_h407.dts index 70e756247d1..f74bddb953d 100644 --- a/boards/arm/olimex_stm32_h407/olimex_stm32_h407.dts +++ b/boards/arm/olimex_stm32_h407/olimex_stm32_h407.dts @@ -42,6 +42,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -86,6 +90,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/olimex_stm32_p405/olimex_stm32_p405.dts b/boards/arm/olimex_stm32_p405/olimex_stm32_p405.dts index d428ed8e799..0069aef01e4 100644 --- a/boards/arm/olimex_stm32_p405/olimex_stm32_p405.dts +++ b/boards/arm/olimex_stm32_p405/olimex_stm32_p405.dts @@ -43,6 +43,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -73,6 +77,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/ronoth_lodev/ronoth_lodev.dts b/boards/arm/ronoth_lodev/ronoth_lodev.dts index 83fb0731d3c..03d7a02db81 100644 --- a/boards/arm/ronoth_lodev/ronoth_lodev.dts +++ b/boards/arm/ronoth_lodev/ronoth_lodev.dts @@ -107,6 +107,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -163,6 +167,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/segger_trb_stm32f407/segger_trb_stm32f407.dts b/boards/arm/segger_trb_stm32f407/segger_trb_stm32f407.dts index 4c481588af4..be532ba8341 100644 --- a/boards/arm/segger_trb_stm32f407/segger_trb_stm32f407.dts +++ b/boards/arm/segger_trb_stm32f407/segger_trb_stm32f407.dts @@ -41,6 +41,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -64,6 +68,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/sensortile_box/sensortile_box.dts b/boards/arm/sensortile_box/sensortile_box.dts index c268ec38851..dcb63f8d488 100644 --- a/boards/arm/sensortile_box/sensortile_box.dts +++ b/boards/arm/sensortile_box/sensortile_box.dts @@ -51,6 +51,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -174,6 +178,8 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/steval_fcu001v1/steval_fcu001v1.dts b/boards/arm/steval_fcu001v1/steval_fcu001v1.dts index eefe5f0276d..bf53559985b 100644 --- a/boards/arm/steval_fcu001v1/steval_fcu001v1.dts +++ b/boards/arm/steval_fcu001v1/steval_fcu001v1.dts @@ -39,6 +39,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -86,6 +90,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/stm32373c_eval/stm32373c_eval.dts b/boards/arm/stm32373c_eval/stm32373c_eval.dts index 5e88b7d724e..69ad9ef3675 100644 --- a/boards/arm/stm32373c_eval/stm32373c_eval.dts +++ b/boards/arm/stm32373c_eval/stm32373c_eval.dts @@ -42,6 +42,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -70,6 +74,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/stm32f3_disco/stm32f3_disco.dts b/boards/arm/stm32f3_disco/stm32f3_disco.dts index 3bf54cc6456..03f51459e49 100644 --- a/boards/arm/stm32f3_disco/stm32f3_disco.dts +++ b/boards/arm/stm32f3_disco/stm32f3_disco.dts @@ -74,6 +74,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -163,6 +167,8 @@ zephyr_udc0: &usb { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/stm32f401_mini/stm32f401_mini.dts b/boards/arm/stm32f401_mini/stm32f401_mini.dts index 2f9cb32ca9f..6ad78236c9c 100644 --- a/boards/arm/stm32f401_mini/stm32f401_mini.dts +++ b/boards/arm/stm32f401_mini/stm32f401_mini.dts @@ -99,6 +99,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; @@ -114,6 +116,10 @@ zephyr_udc0: &usbotg_fs { status = "okay"; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; diff --git a/boards/arm/stm32f411e_disco/stm32f411e_disco.dts b/boards/arm/stm32f411e_disco/stm32f411e_disco.dts index 1a98da1460e..b2a21d2a1ca 100644 --- a/boards/arm/stm32f411e_disco/stm32f411e_disco.dts +++ b/boards/arm/stm32f411e_disco/stm32f411e_disco.dts @@ -78,6 +78,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -144,6 +148,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/stm32f412g_disco/stm32f412g_disco.dts b/boards/arm/stm32f412g_disco/stm32f412g_disco.dts index ccb5bda394b..56704e923d4 100644 --- a/boards/arm/stm32f412g_disco/stm32f412g_disco.dts +++ b/boards/arm/stm32f412g_disco/stm32f412g_disco.dts @@ -73,6 +73,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { hse-bypass; clock-frequency = ; /* STLink 8MHz clock */ @@ -125,6 +129,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/stm32f429i_disc1/stm32f429i_disc1.dts b/boards/arm/stm32f429i_disc1/stm32f429i_disc1.dts index cafb451bfde..3836e13c0d0 100644 --- a/boards/arm/stm32f429i_disc1/stm32f429i_disc1.dts +++ b/boards/arm/stm32f429i_disc1/stm32f429i_disc1.dts @@ -56,6 +56,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -86,6 +90,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/stm32f469i_disco/stm32f469i_disco.dts b/boards/arm/stm32f469i_disco/stm32f469i_disco.dts index e7e3174c1d2..7327ae9e4e1 100644 --- a/boards/arm/stm32f469i_disco/stm32f469i_disco.dts +++ b/boards/arm/stm32f469i_disco/stm32f469i_disco.dts @@ -58,6 +58,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -114,5 +118,7 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/stm32f4_disco/stm32f4_disco.dts b/boards/arm/stm32f4_disco/stm32f4_disco.dts index 15a79e0a90a..f765bdfb058 100644 --- a/boards/arm/stm32f4_disco/stm32f4_disco.dts +++ b/boards/arm/stm32f4_disco/stm32f4_disco.dts @@ -65,6 +65,10 @@ status = "okay"; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -105,6 +109,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/stm32f746g_disco/stm32f746g_disco.dts b/boards/arm/stm32f746g_disco/stm32f746g_disco.dts index 54586789967..509a31e1be1 100644 --- a/boards/arm/stm32f746g_disco/stm32f746g_disco.dts +++ b/boards/arm/stm32f746g_disco/stm32f746g_disco.dts @@ -55,6 +55,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -136,6 +140,8 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/stm32f7508_dk/stm32f7508_dk.dts b/boards/arm/stm32f7508_dk/stm32f7508_dk.dts index 6e490f89cb6..2a033535aaa 100644 --- a/boards/arm/stm32f7508_dk/stm32f7508_dk.dts +++ b/boards/arm/stm32f7508_dk/stm32f7508_dk.dts @@ -56,6 +56,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hse { clock-frequency = ; status = "okay"; @@ -137,6 +141,8 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/stm32l476g_disco/stm32l476g_disco.dts b/boards/arm/stm32l476g_disco/stm32l476g_disco.dts index ff06524845a..4a2bbc938d8 100644 --- a/boards/arm/stm32l476g_disco/stm32l476g_disco.dts +++ b/boards/arm/stm32l476g_disco/stm32l476g_disco.dts @@ -65,6 +65,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -95,5 +99,7 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/stm32l496g_disco/stm32l496g_disco.dts b/boards/arm/stm32l496g_disco/stm32l496g_disco.dts index 19697e22676..007b24135db 100644 --- a/boards/arm/stm32l496g_disco/stm32l496g_disco.dts +++ b/boards/arm/stm32l496g_disco/stm32l496g_disco.dts @@ -63,6 +63,10 @@ }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -131,6 +135,8 @@ }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; }; diff --git a/boards/arm/swan_r5/swan_r5.dts b/boards/arm/swan_r5/swan_r5.dts index ac95bbfb73f..8be389081d9 100644 --- a/boards/arm/swan_r5/swan_r5.dts +++ b/boards/arm/swan_r5/swan_r5.dts @@ -54,6 +54,10 @@ }; }; +&clk_lsi { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; @@ -161,6 +165,8 @@ zephyr_udc0: &usbotg_fs { }; &rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; };