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drivers: Update DT IRQ alias defines

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The defines should have had a _0 on them, now that we generate the
proper defines, fixup the cases that used that old scheme.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2019-06-19 12:55:29 -05:00 • committed by Kumar Gala
commit dba65ce47c
23 changed files with 113 additions and 112 deletions
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4
drivers/adc/adc_nrfx_adc.c
View file

@ -259,8 +259,8 @@ static int init_adc(struct device *dev)
return -EBUSY; return -EBUSY;
} }
IRQ_CONNECT(DT_NORDIC_NRF_ADC_ADC_0_IRQ, IRQ_CONNECT(DT_NORDIC_NRF_ADC_ADC_0_IRQ_0,
DT_NORDIC_NRF_ADC_ADC_0_IRQ_PRIORITY, DT_NORDIC_NRF_ADC_ADC_0_IRQ_0_PRIORITY,
nrfx_isr, nrfx_adc_irq_handler, 0); nrfx_isr, nrfx_adc_irq_handler, 0);
adc_context_unlock_unconditionally(&m_data.ctx); adc_context_unlock_unconditionally(&m_data.ctx);

6
drivers/adc/adc_nrfx_saadc.c
View file

@ -389,10 +389,10 @@ static int init_saadc(struct device *dev)
nrf_saadc_event_clear(NRF_SAADC_EVENT_CALIBRATEDONE); nrf_saadc_event_clear(NRF_SAADC_EVENT_CALIBRATEDONE);
nrf_saadc_int_enable(NRF_SAADC_INT_END nrf_saadc_int_enable(NRF_SAADC_INT_END
| NRF_SAADC_INT_CALIBRATEDONE); | NRF_SAADC_INT_CALIBRATEDONE);
NRFX_IRQ_ENABLE(DT_NORDIC_NRF_SAADC_ADC_0_IRQ); NRFX_IRQ_ENABLE(DT_NORDIC_NRF_SAADC_ADC_0_IRQ_0);
IRQ_CONNECT(DT_NORDIC_NRF_SAADC_ADC_0_IRQ, IRQ_CONNECT(DT_NORDIC_NRF_SAADC_ADC_0_IRQ_0,
DT_NORDIC_NRF_SAADC_ADC_0_IRQ_PRIORITY, DT_NORDIC_NRF_SAADC_ADC_0_IRQ_0_PRIORITY,
saadc_irq_handler, DEVICE_GET(adc_0), 0); saadc_irq_handler, DEVICE_GET(adc_0), 0);
adc_context_unlock_unconditionally(&m_data.ctx); adc_context_unlock_unconditionally(&m_data.ctx);

4
drivers/counter/counter_nrfx_rtc.c
View file

@ -328,8 +328,8 @@ static const struct counter_driver_api counter_nrfx_driver_api = {
} \ } \
static int counter_##idx##_init(struct device *dev) \ static int counter_##idx##_init(struct device *dev) \
{ \ { \
IRQ_CONNECT(DT_NORDIC_NRF_RTC_RTC_##idx##_IRQ, \ IRQ_CONNECT(DT_NORDIC_NRF_RTC_RTC_##idx##_IRQ_0, \
DT_NORDIC_NRF_RTC_RTC_##idx##_IRQ_PRIORITY, \ DT_NORDIC_NRF_RTC_RTC_##idx##_IRQ_0_PRIORITY, \
nrfx_isr, nrfx_rtc_##idx##_irq_handler, 0); \ nrfx_isr, nrfx_rtc_##idx##_irq_handler, 0); \
const nrfx_rtc_config_t config = { \ const nrfx_rtc_config_t config = { \
.prescaler = \ .prescaler = \

4
drivers/counter/counter_nrfx_timer.c
View file

@ -257,8 +257,8 @@ static const struct counter_driver_api counter_nrfx_driver_api = {
"TIMER prescaler out of range"); \ "TIMER prescaler out of range"); \
static int counter_##idx##_init(struct device *dev) \ static int counter_##idx##_init(struct device *dev) \
{ \ { \
IRQ_CONNECT(DT_NORDIC_NRF_TIMER_TIMER_##idx##_IRQ, \ IRQ_CONNECT(DT_NORDIC_NRF_TIMER_TIMER_##idx##_IRQ_0, \
DT_NORDIC_NRF_TIMER_TIMER_##idx##_IRQ_PRIORITY, \ DT_NORDIC_NRF_TIMER_TIMER_##idx##_IRQ_0_PRIORITY, \
nrfx_isr, nrfx_timer_##idx##_irq_handler, 0); \ nrfx_isr, nrfx_timer_##idx##_irq_handler, 0); \
const nrfx_timer_config_t config = { \ const nrfx_timer_config_t config = { \
.frequency = \ .frequency = \

40
drivers/gpio/gpio_mcux.c
View file

@ -242,7 +242,7 @@ static int gpio_mcux_porta_init(struct device *dev);
static const struct gpio_mcux_config gpio_mcux_porta_config = { static const struct gpio_mcux_config gpio_mcux_porta_config = {
.gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_A_BASE_ADDRESS, .gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_A_BASE_ADDRESS,
.port_base = PORTA, .port_base = PORTA,
#ifdef DT_NXP_KINETIS_GPIO_GPIO_A_IRQ #ifdef DT_NXP_KINETIS_GPIO_GPIO_A_IRQ_0
.flags = GPIO_INT, .flags = GPIO_INT,
#else #else
.flags = 0, .flags = 0,
@ -259,11 +259,11 @@ DEVICE_AND_API_INIT(gpio_mcux_porta, DT_NXP_KINETIS_GPIO_GPIO_A_LABEL,
static int gpio_mcux_porta_init(struct device *dev) static int gpio_mcux_porta_init(struct device *dev)
{ {
#ifdef DT_NXP_KINETIS_GPIO_GPIO_A_IRQ #ifdef DT_NXP_KINETIS_GPIO_GPIO_A_IRQ_0
IRQ_CONNECT(DT_NXP_KINETIS_GPIO_GPIO_A_IRQ, DT_NXP_KINETIS_GPIO_GPIO_A_IRQ_PRIORITY, IRQ_CONNECT(DT_NXP_KINETIS_GPIO_GPIO_A_IRQ_0, DT_NXP_KINETIS_GPIO_GPIO_A_IRQ_0_PRIORITY,
gpio_mcux_port_isr, DEVICE_GET(gpio_mcux_porta), 0); gpio_mcux_port_isr, DEVICE_GET(gpio_mcux_porta), 0);
irq_enable(DT_NXP_KINETIS_GPIO_GPIO_A_IRQ); irq_enable(DT_NXP_KINETIS_GPIO_GPIO_A_IRQ_0);
#endif #endif
return 0; return 0;
} }
@ -275,7 +275,7 @@ static int gpio_mcux_portb_init(struct device *dev);
static const struct gpio_mcux_config gpio_mcux_portb_config = { static const struct gpio_mcux_config gpio_mcux_portb_config = {
.gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_B_BASE_ADDRESS, .gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_B_BASE_ADDRESS,
.port_base = PORTB, .port_base = PORTB,
#ifdef DT_NXP_KINETIS_GPIO_GPIO_B_IRQ #ifdef DT_NXP_KINETIS_GPIO_GPIO_B_IRQ_0
.flags = GPIO_INT, .flags = GPIO_INT,
#else #else
.flags = 0, .flags = 0,
@ -292,11 +292,11 @@ DEVICE_AND_API_INIT(gpio_mcux_portb, DT_NXP_KINETIS_GPIO_GPIO_B_LABEL,
static int gpio_mcux_portb_init(struct device *dev) static int gpio_mcux_portb_init(struct device *dev)
{ {
#ifdef DT_NXP_KINETIS_GPIO_GPIO_B_IRQ #ifdef DT_NXP_KINETIS_GPIO_GPIO_B_IRQ_0
IRQ_CONNECT(DT_NXP_KINETIS_GPIO_GPIO_B_IRQ, DT_NXP_KINETIS_GPIO_GPIO_B_IRQ_PRIORITY, IRQ_CONNECT(DT_NXP_KINETIS_GPIO_GPIO_B_IRQ_0, DT_NXP_KINETIS_GPIO_GPIO_B_IRQ_0_PRIORITY,
gpio_mcux_port_isr, DEVICE_GET(gpio_mcux_portb), 0); gpio_mcux_port_isr, DEVICE_GET(gpio_mcux_portb), 0);
irq_enable(DT_NXP_KINETIS_GPIO_GPIO_B_IRQ); irq_enable(DT_NXP_KINETIS_GPIO_GPIO_B_IRQ_0);
#endif #endif
return 0; return 0;
} }
@ -308,7 +308,7 @@ static int gpio_mcux_portc_init(struct device *dev);
static const struct gpio_mcux_config gpio_mcux_portc_config = { static const struct gpio_mcux_config gpio_mcux_portc_config = {
.gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_C_BASE_ADDRESS, .gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_C_BASE_ADDRESS,
.port_base = PORTC, .port_base = PORTC,
#ifdef DT_NXP_KINETIS_GPIO_GPIO_C_IRQ #ifdef DT_NXP_KINETIS_GPIO_GPIO_C_IRQ_0
.flags = GPIO_INT, .flags = GPIO_INT,
#else #else
.flags = 0, .flags = 0,
@ -325,11 +325,11 @@ DEVICE_AND_API_INIT(gpio_mcux_portc, DT_NXP_KINETIS_GPIO_GPIO_C_LABEL,
static int gpio_mcux_portc_init(struct device *dev) static int gpio_mcux_portc_init(struct device *dev)
{ {
#ifdef DT_NXP_KINETIS_GPIO_GPIO_C_IRQ #ifdef DT_NXP_KINETIS_GPIO_GPIO_C_IRQ_0
IRQ_CONNECT(DT_NXP_KINETIS_GPIO_GPIO_C_IRQ, DT_NXP_KINETIS_GPIO_GPIO_C_IRQ_PRIORITY, IRQ_CONNECT(DT_NXP_KINETIS_GPIO_GPIO_C_IRQ_0, DT_NXP_KINETIS_GPIO_GPIO_C_IRQ_0_PRIORITY,
gpio_mcux_port_isr, DEVICE_GET(gpio_mcux_portc), 0); gpio_mcux_port_isr, DEVICE_GET(gpio_mcux_portc), 0);
irq_enable(DT_NXP_KINETIS_GPIO_GPIO_C_IRQ); irq_enable(DT_NXP_KINETIS_GPIO_GPIO_C_IRQ_0);
#endif #endif
return 0; return 0;
} }
@ -341,7 +341,7 @@ static int gpio_mcux_portd_init(struct device *dev);
static const struct gpio_mcux_config gpio_mcux_portd_config = { static const struct gpio_mcux_config gpio_mcux_portd_config = {
.gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_D_BASE_ADDRESS, .gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_D_BASE_ADDRESS,
.port_base = PORTD, .port_base = PORTD,
#ifdef DT_NXP_KINETIS_GPIO_GPIO_D_IRQ #ifdef DT_NXP_KINETIS_GPIO_GPIO_D_IRQ_0
.flags = GPIO_INT, .flags = GPIO_INT,
#else #else
.flags = 0, .flags = 0,
@ -358,11 +358,11 @@ DEVICE_AND_API_INIT(gpio_mcux_portd, DT_NXP_KINETIS_GPIO_GPIO_D_LABEL,
static int gpio_mcux_portd_init(struct device *dev) static int gpio_mcux_portd_init(struct device *dev)
{ {
#ifdef DT_NXP_KINETIS_GPIO_GPIO_D_IRQ #ifdef DT_NXP_KINETIS_GPIO_GPIO_D_IRQ_0
IRQ_CONNECT(DT_NXP_KINETIS_GPIO_GPIO_D_IRQ, DT_NXP_KINETIS_GPIO_GPIO_D_IRQ_PRIORITY, IRQ_CONNECT(DT_NXP_KINETIS_GPIO_GPIO_D_IRQ_0, DT_NXP_KINETIS_GPIO_GPIO_D_IRQ_0_PRIORITY,
gpio_mcux_port_isr, DEVICE_GET(gpio_mcux_portd), 0); gpio_mcux_port_isr, DEVICE_GET(gpio_mcux_portd), 0);
irq_enable(DT_NXP_KINETIS_GPIO_GPIO_D_IRQ); irq_enable(DT_NXP_KINETIS_GPIO_GPIO_D_IRQ_0);
#endif #endif
return 0; return 0;
} }
@ -374,7 +374,7 @@ static int gpio_mcux_porte_init(struct device *dev);
static const struct gpio_mcux_config gpio_mcux_porte_config = { static const struct gpio_mcux_config gpio_mcux_porte_config = {
.gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_E_BASE_ADDRESS, .gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_E_BASE_ADDRESS,
.port_base = PORTE, .port_base = PORTE,
#ifdef DT_NXP_KINETIS_GPIO_GPIO_E_IRQ #ifdef DT_NXP_KINETIS_GPIO_GPIO_E_IRQ_0
.flags = GPIO_INT, .flags = GPIO_INT,
#else #else
.flags = 0, .flags = 0,
@ -391,11 +391,11 @@ DEVICE_AND_API_INIT(gpio_mcux_porte, DT_NXP_KINETIS_GPIO_GPIO_E_LABEL,
static int gpio_mcux_porte_init(struct device *dev) static int gpio_mcux_porte_init(struct device *dev)
{ {
#ifdef DT_NXP_KINETIS_GPIO_GPIO_E_IRQ #ifdef DT_NXP_KINETIS_GPIO_GPIO_E_IRQ_0
IRQ_CONNECT(DT_NXP_KINETIS_GPIO_GPIO_E_IRQ, DT_NXP_KINETIS_GPIO_GPIO_E_IRQ_PRIORITY, IRQ_CONNECT(DT_NXP_KINETIS_GPIO_GPIO_E_IRQ_0, DT_NXP_KINETIS_GPIO_GPIO_E_IRQ_0_PRIORITY,
gpio_mcux_port_isr, DEVICE_GET(gpio_mcux_porte), 0); gpio_mcux_port_isr, DEVICE_GET(gpio_mcux_porte), 0);
irq_enable(DT_NXP_KINETIS_GPIO_GPIO_E_IRQ); irq_enable(DT_NXP_KINETIS_GPIO_GPIO_E_IRQ_0);
#endif #endif
return 0; return 0;
} }

6
drivers/gpio/gpio_nrfx.c
View file

@ -475,11 +475,11 @@ static int gpio_nrfx_init(struct device *port)
if (!gpio_initialized) { if (!gpio_initialized) {
gpio_initialized = true; gpio_initialized = true;
IRQ_CONNECT(DT_NORDIC_NRF_GPIOTE_GPIOTE_0_IRQ, IRQ_CONNECT(DT_NORDIC_NRF_GPIOTE_GPIOTE_0_IRQ_0,
DT_NORDIC_NRF_GPIOTE_GPIOTE_0_IRQ_PRIORITY, DT_NORDIC_NRF_GPIOTE_GPIOTE_0_IRQ_0_PRIORITY,
gpiote_event_handler, NULL, 0); gpiote_event_handler, NULL, 0);
irq_enable(DT_NORDIC_NRF_GPIOTE_GPIOTE_0_IRQ); irq_enable(DT_NORDIC_NRF_GPIOTE_GPIOTE_0_IRQ_0);
nrf_gpiote_int_enable(NRF_GPIOTE_INT_PORT_MASK); nrf_gpiote_int_enable(NRF_GPIOTE_INT_PORT_MASK);
} }

50
drivers/gpio/gpio_rv32m1.c
View file

@ -269,7 +269,7 @@ static int gpio_rv32m1_porta_init(struct device *dev);
static const struct gpio_rv32m1_config gpio_rv32m1_porta_config = { static const struct gpio_rv32m1_config gpio_rv32m1_porta_config = {
.gpio_base = (GPIO_Type *) DT_OPENISA_RV32M1_GPIO_GPIO_A_BASE_ADDRESS, .gpio_base = (GPIO_Type *) DT_OPENISA_RV32M1_GPIO_GPIO_A_BASE_ADDRESS,
.port_base = PORTA, .port_base = PORTA,
#ifdef DT_OPENISA_RV32M1_GPIO_GPIO_A_IRQ #ifdef DT_OPENISA_RV32M1_GPIO_GPIO_A_IRQ_0
.flags = GPIO_INT, .flags = GPIO_INT,
#else #else
.flags = 0, .flags = 0,
@ -294,12 +294,12 @@ DEVICE_AND_API_INIT(gpio_rv32m1_porta, DT_OPENISA_RV32M1_GPIO_GPIO_A_LABEL,
static int gpio_rv32m1_porta_init(struct device *dev) static int gpio_rv32m1_porta_init(struct device *dev)
{ {
#ifdef DT_OPENISA_RV32M1_GPIO_GPIO_A_IRQ #ifdef DT_OPENISA_RV32M1_GPIO_GPIO_A_IRQ_0
IRQ_CONNECT(DT_OPENISA_RV32M1_GPIO_GPIO_A_IRQ, IRQ_CONNECT(DT_OPENISA_RV32M1_GPIO_GPIO_A_IRQ_0,
DT_OPENISA_RV32M1_GPIO_GPIO_A_IRQ_PRIORITY, DT_OPENISA_RV32M1_GPIO_GPIO_A_IRQ_0_PRIORITY,
gpio_rv32m1_port_isr, DEVICE_GET(gpio_rv32m1_porta), 0); gpio_rv32m1_port_isr, DEVICE_GET(gpio_rv32m1_porta), 0);
irq_enable(DT_OPENISA_RV32M1_GPIO_GPIO_A_IRQ); irq_enable(DT_OPENISA_RV32M1_GPIO_GPIO_A_IRQ_0);
return 0; return 0;
#else #else
@ -314,7 +314,7 @@ static int gpio_rv32m1_portb_init(struct device *dev);
static const struct gpio_rv32m1_config gpio_rv32m1_portb_config = { static const struct gpio_rv32m1_config gpio_rv32m1_portb_config = {
.gpio_base = (GPIO_Type *) DT_OPENISA_RV32M1_GPIO_GPIO_B_BASE_ADDRESS, .gpio_base = (GPIO_Type *) DT_OPENISA_RV32M1_GPIO_GPIO_B_BASE_ADDRESS,
.port_base = PORTB, .port_base = PORTB,
#ifdef DT_OPENISA_RV32M1_GPIO_GPIO_B_IRQ #ifdef DT_OPENISA_RV32M1_GPIO_GPIO_B_IRQ_0
.flags = GPIO_INT, .flags = GPIO_INT,
#else #else
.flags = 0, .flags = 0,
@ -339,12 +339,12 @@ DEVICE_AND_API_INIT(gpio_rv32m1_portb, DT_OPENISA_RV32M1_GPIO_GPIO_B_LABEL,
static int gpio_rv32m1_portb_init(struct device *dev) static int gpio_rv32m1_portb_init(struct device *dev)
{ {
#ifdef DT_OPENISA_RV32M1_GPIO_GPIO_B_IRQ #ifdef DT_OPENISA_RV32M1_GPIO_GPIO_B_IRQ_0
IRQ_CONNECT(DT_OPENISA_RV32M1_GPIO_GPIO_B_IRQ, IRQ_CONNECT(DT_OPENISA_RV32M1_GPIO_GPIO_B_IRQ_0,
DT_OPENISA_RV32M1_GPIO_GPIO_B_IRQ_PRIORITY, DT_OPENISA_RV32M1_GPIO_GPIO_B_IRQ_0_PRIORITY,
gpio_rv32m1_port_isr, DEVICE_GET(gpio_rv32m1_portb), 0); gpio_rv32m1_port_isr, DEVICE_GET(gpio_rv32m1_portb), 0);
irq_enable(DT_OPENISA_RV32M1_GPIO_GPIO_B_IRQ); irq_enable(DT_OPENISA_RV32M1_GPIO_GPIO_B_IRQ_0);
return 0; return 0;
#else #else
@ -359,7 +359,7 @@ static int gpio_rv32m1_portc_init(struct device *dev);
static const struct gpio_rv32m1_config gpio_rv32m1_portc_config = { static const struct gpio_rv32m1_config gpio_rv32m1_portc_config = {
.gpio_base = (GPIO_Type *) DT_OPENISA_RV32M1_GPIO_GPIO_C_BASE_ADDRESS, .gpio_base = (GPIO_Type *) DT_OPENISA_RV32M1_GPIO_GPIO_C_BASE_ADDRESS,
.port_base = PORTC, .port_base = PORTC,
#ifdef DT_OPENISA_RV32M1_GPIO_GPIO_C_IRQ #ifdef DT_OPENISA_RV32M1_GPIO_GPIO_C_IRQ_0
.flags = GPIO_INT, .flags = GPIO_INT,
#else #else
.flags = 0, .flags = 0,
@ -385,12 +385,12 @@ DEVICE_AND_API_INIT(gpio_rv32m1_portc, DT_OPENISA_RV32M1_GPIO_GPIO_C_LABEL,
static int gpio_rv32m1_portc_init(struct device *dev) static int gpio_rv32m1_portc_init(struct device *dev)
{ {
#ifdef DT_OPENISA_RV32M1_GPIO_GPIO_C_IRQ #ifdef DT_OPENISA_RV32M1_GPIO_GPIO_C_IRQ_0
IRQ_CONNECT(DT_OPENISA_RV32M1_GPIO_GPIO_C_IRQ, IRQ_CONNECT(DT_OPENISA_RV32M1_GPIO_GPIO_C_IRQ_0,
DT_OPENISA_RV32M1_GPIO_GPIO_C_IRQ_PRIORITY, DT_OPENISA_RV32M1_GPIO_GPIO_C_IRQ_0_PRIORITY,
gpio_rv32m1_port_isr, DEVICE_GET(gpio_rv32m1_portc), 0); gpio_rv32m1_port_isr, DEVICE_GET(gpio_rv32m1_portc), 0);
irq_enable(DT_OPENISA_RV32M1_GPIO_GPIO_C_IRQ); irq_enable(DT_OPENISA_RV32M1_GPIO_GPIO_C_IRQ_0);
return 0; return 0;
#else #else
@ -405,7 +405,7 @@ static int gpio_rv32m1_portd_init(struct device *dev);
static const struct gpio_rv32m1_config gpio_rv32m1_portd_config = { static const struct gpio_rv32m1_config gpio_rv32m1_portd_config = {
.gpio_base = (GPIO_Type *) DT_OPENISA_RV32M1_GPIO_GPIO_D_BASE_ADDRESS, .gpio_base = (GPIO_Type *) DT_OPENISA_RV32M1_GPIO_GPIO_D_BASE_ADDRESS,
.port_base = PORTD, .port_base = PORTD,
#ifdef DT_OPENISA_RV32M1_GPIO_GPIO_D_IRQ #ifdef DT_OPENISA_RV32M1_GPIO_GPIO_D_IRQ_0
.flags = GPIO_INT, .flags = GPIO_INT,
#else #else
.flags = 0, .flags = 0,
@ -430,12 +430,12 @@ DEVICE_AND_API_INIT(gpio_rv32m1_portd, DT_OPENISA_RV32M1_GPIO_GPIO_D_LABEL,
static int gpio_rv32m1_portd_init(struct device *dev) static int gpio_rv32m1_portd_init(struct device *dev)
{ {
#ifdef DT_OPENISA_RV32M1_GPIO_GPIO_D_IRQ #ifdef DT_OPENISA_RV32M1_GPIO_GPIO_D_IRQ_0
IRQ_CONNECT(DT_OPENISA_RV32M1_GPIO_GPIO_D_IRQ, IRQ_CONNECT(DT_OPENISA_RV32M1_GPIO_GPIO_D_IRQ_0,
DT_OPENISA_RV32M1_GPIO_GPIO_D_IRQ_PRIORITY, DT_OPENISA_RV32M1_GPIO_GPIO_D_IRQ_0_PRIORITY,
gpio_rv32m1_port_isr, DEVICE_GET(gpio_rv32m1_portd), 0); gpio_rv32m1_port_isr, DEVICE_GET(gpio_rv32m1_portd), 0);
irq_enable(DT_OPENISA_RV32M1_GPIO_GPIO_D_IRQ); irq_enable(DT_OPENISA_RV32M1_GPIO_GPIO_D_IRQ_0);
return 0; return 0;
#else #else
@ -450,7 +450,7 @@ static int gpio_rv32m1_porte_init(struct device *dev);
static const struct gpio_rv32m1_config gpio_rv32m1_porte_config = { static const struct gpio_rv32m1_config gpio_rv32m1_porte_config = {
.gpio_base = (GPIO_Type *) DT_OPENISA_RV32M1_GPIO_GPIO_E_BASE_ADDRESS, .gpio_base = (GPIO_Type *) DT_OPENISA_RV32M1_GPIO_GPIO_E_BASE_ADDRESS,
.port_base = PORTE, .port_base = PORTE,
#ifdef DT_OPENISA_RV32M1_GPIO_GPIO_E_IRQ #ifdef DT_OPENISA_RV32M1_GPIO_GPIO_E_IRQ_0
.flags = GPIO_INT, .flags = GPIO_INT,
#else #else
.flags = 0, .flags = 0,
@ -475,12 +475,12 @@ DEVICE_AND_API_INIT(gpio_rv32m1_porte, DT_OPENISA_RV32M1_GPIO_GPIO_E_LABEL,
static int gpio_rv32m1_porte_init(struct device *dev) static int gpio_rv32m1_porte_init(struct device *dev)
{ {
#ifdef DT_OPENISA_RV32M1_GPIO_GPIO_E_IRQ #ifdef DT_OPENISA_RV32M1_GPIO_GPIO_E_IRQ_0
IRQ_CONNECT(DT_OPENISA_RV32M1_GPIO_GPIO_E_IRQ, IRQ_CONNECT(DT_OPENISA_RV32M1_GPIO_GPIO_E_IRQ_0,
DT_OPENISA_RV32M1_GPIO_GPIO_E_IRQ_PRIORITY, DT_OPENISA_RV32M1_GPIO_GPIO_E_IRQ_0_PRIORITY,
gpio_rv32m1_port_isr, DEVICE_GET(gpio_rv32m1_porte), 0); gpio_rv32m1_port_isr, DEVICE_GET(gpio_rv32m1_porte), 0);
irq_enable(DT_OPENISA_RV32M1_GPIO_GPIO_E_IRQ); irq_enable(DT_OPENISA_RV32M1_GPIO_GPIO_E_IRQ_0);
return 0; return 0;
#else #else

16
drivers/i2c/i2c_imx.c
View file

@ -373,10 +373,10 @@ static void i2c_imx_config_func_1(struct device *dev)
{ {
ARG_UNUSED(dev); ARG_UNUSED(dev);
IRQ_CONNECT(DT_FSL_IMX7D_I2C_I2C_1_IRQ, DT_FSL_IMX7D_I2C_I2C_1_IRQ_PRIORITY, IRQ_CONNECT(DT_FSL_IMX7D_I2C_I2C_1_IRQ_0, DT_FSL_IMX7D_I2C_I2C_1_IRQ_0_PRIORITY,
i2c_imx_isr, DEVICE_GET(i2c_imx_1), 0); i2c_imx_isr, DEVICE_GET(i2c_imx_1), 0);
irq_enable(DT_FSL_IMX7D_I2C_I2C_1_IRQ); irq_enable(DT_FSL_IMX7D_I2C_I2C_1_IRQ_0);
} }
#endif /* CONFIG_I2C_1 */ #endif /* CONFIG_I2C_1 */
@ -400,10 +400,10 @@ static void i2c_imx_config_func_2(struct device *dev)
{ {
ARG_UNUSED(dev); ARG_UNUSED(dev);
IRQ_CONNECT(DT_FSL_IMX7D_I2C_I2C_2_IRQ, DT_FSL_IMX7D_I2C_I2C_2_IRQ_PRIORITY, IRQ_CONNECT(DT_FSL_IMX7D_I2C_I2C_2_IRQ_0, DT_FSL_IMX7D_I2C_I2C_2_IRQ_0_PRIORITY,
i2c_imx_isr, DEVICE_GET(i2c_imx_2), 0); i2c_imx_isr, DEVICE_GET(i2c_imx_2), 0);
irq_enable(DT_FSL_IMX7D_I2C_I2C_2_IRQ); irq_enable(DT_FSL_IMX7D_I2C_I2C_2_IRQ_0);
} }
#endif /* CONFIG_I2C_2 */ #endif /* CONFIG_I2C_2 */
@ -427,10 +427,10 @@ static void i2c_imx_config_func_3(struct device *dev)
{ {
ARG_UNUSED(dev); ARG_UNUSED(dev);
IRQ_CONNECT(DT_FSL_IMX7D_I2C_I2C_3_IRQ, DT_FSL_IMX7D_I2C_I2C_3_IRQ_PRIORITY, IRQ_CONNECT(DT_FSL_IMX7D_I2C_I2C_3_IRQ_0, DT_FSL_IMX7D_I2C_I2C_3_IRQ_0_PRIORITY,
i2c_imx_isr, DEVICE_GET(i2c_imx_3), 0); i2c_imx_isr, DEVICE_GET(i2c_imx_3), 0);
irq_enable(DT_FSL_IMX7D_I2C_I2C_3_IRQ); irq_enable(DT_FSL_IMX7D_I2C_I2C_3_IRQ_0);
} }
#endif /* CONFIG_I2C_3 */ #endif /* CONFIG_I2C_3 */
@ -453,9 +453,9 @@ DEVICE_AND_API_INIT(i2c_imx_4, DT_FSL_IMX7D_I2C_I2C_4_LABEL, &i2c_imx_init,
static void i2c_imx_config_func_4(struct device *dev) static void i2c_imx_config_func_4(struct device *dev)
{ {
ARG_UNUSED(dev); ARG_UNUSED(dev);
IRQ_CONNECT(DT_FSL_IMX7D_I2C_I2C_4_IRQ, DT_FSL_IMX7D_I2C_I2C_4_IRQ_PRIORITY, IRQ_CONNECT(DT_FSL_IMX7D_I2C_I2C_4_IRQ_0, DT_FSL_IMX7D_I2C_I2C_4_IRQ_0_PRIORITY,
i2c_imx_isr, DEVICE_GET(i2c_imx_4), 0); i2c_imx_isr, DEVICE_GET(i2c_imx_4), 0);
irq_enable(DT_FSL_IMX7D_I2C_I2C_4_IRQ); irq_enable(DT_FSL_IMX7D_I2C_I2C_4_IRQ_0);
} }
#endif /* CONFIG_I2C_4 */ #endif /* CONFIG_I2C_4 */

4
drivers/i2c/i2c_nrfx_twi.c
View file

@ -163,8 +163,8 @@ static int init_twi(struct device *dev, const nrfx_twi_config_t *config)
"Wrong I2C " #idx " frequency setting in dts"); \ "Wrong I2C " #idx " frequency setting in dts"); \
static int twi_##idx##_init(struct device *dev) \ static int twi_##idx##_init(struct device *dev) \
{ \ { \
IRQ_CONNECT(DT_NORDIC_NRF_I2C_I2C_##idx##_IRQ, \ IRQ_CONNECT(DT_NORDIC_NRF_I2C_I2C_##idx##_IRQ_0, \
DT_NORDIC_NRF_I2C_I2C_##idx##_IRQ_PRIORITY, \ DT_NORDIC_NRF_I2C_I2C_##idx##_IRQ_0_PRIORITY, \
nrfx_isr, nrfx_twi_##idx##_irq_handler, 0); \ nrfx_isr, nrfx_twi_##idx##_irq_handler, 0); \
const nrfx_twi_config_t config = { \ const nrfx_twi_config_t config = { \
.scl = DT_NORDIC_NRF_I2C_I2C_##idx##_SCL_PIN, \ .scl = DT_NORDIC_NRF_I2C_I2C_##idx##_SCL_PIN, \

4
drivers/i2c/i2c_nrfx_twim.c
View file

@ -166,8 +166,8 @@ static int init_twim(struct device *dev, const nrfx_twim_config_t *config)
"Wrong I2C " #idx " frequency setting in dts"); \ "Wrong I2C " #idx " frequency setting in dts"); \
static int twim_##idx##_init(struct device *dev) \ static int twim_##idx##_init(struct device *dev) \
{ \ { \
IRQ_CONNECT(DT_NORDIC_NRF_I2C_I2C_##idx##_IRQ, \ IRQ_CONNECT(DT_NORDIC_NRF_I2C_I2C_##idx##_IRQ_0, \
DT_NORDIC_NRF_I2C_I2C_##idx##_IRQ_PRIORITY, \ DT_NORDIC_NRF_I2C_I2C_##idx##_IRQ_0_PRIORITY, \
nrfx_isr, nrfx_twim_##idx##_irq_handler, 0); \ nrfx_isr, nrfx_twim_##idx##_irq_handler, 0); \
const nrfx_twim_config_t config = { \ const nrfx_twim_config_t config = { \
.scl = DT_NORDIC_NRF_I2C_I2C_##idx##_SCL_PIN, \ .scl = DT_NORDIC_NRF_I2C_I2C_##idx##_SCL_PIN, \

7
drivers/i2c/i2c_rv32m1_lpi2c.c
View file

@ -289,15 +289,16 @@ static const struct i2c_driver_api rv32m1_lpi2c_driver_api = {
&rv32m1_lpi2c_driver_api); \ &rv32m1_lpi2c_driver_api); \
static void rv32m1_lpi2c_irq_config_func_##id(struct device *dev) \ static void rv32m1_lpi2c_irq_config_func_##id(struct device *dev) \
{ \ { \
IRQ_CONNECT(DT_OPENISA_RV32M1_LPI2C_I2C_##id##_IRQ, \ IRQ_CONNECT(DT_OPENISA_RV32M1_LPI2C_I2C_##id##_IRQ_0, \
DT_OPENISA_RV32M1_LPI2C_I2C_##id##_IRQ_PRI, \ KUMARDT_OPENISA_RV32M1_LPI2C_I2C_##id##_IRQ_0_PRI, \
rv32m1_lpi2c_isr, DEVICE_GET(rv32m1_lpi2c_##id), \ rv32m1_lpi2c_isr, DEVICE_GET(rv32m1_lpi2c_##id), \
0); \ 0); \
irq_enable(DT_OPENISA_RV32M1_LPI2C_I2C_##id##_IRQ); \ irq_enable(DT_OPENISA_RV32M1_LPI2C_I2C_##id##_IRQ_0); \
} \ } \
#ifdef CONFIG_I2C_0 #ifdef CONFIG_I2C_0
RV32M1_LPI2C_DEVICE(0) RV32M1_LPI2C_DEVICE(0)
#error KUMAR
#endif #endif
#ifdef CONFIG_I2C_1 #ifdef CONFIG_I2C_1

6
drivers/i2c/i2c_sam0.c
View file

@ -766,11 +766,11 @@ static const struct i2c_driver_api i2c_sam0_driver_api = {
CONFIG_I2C_INIT_PRIORITY, &i2c_sam0_driver_api);\ CONFIG_I2C_INIT_PRIORITY, &i2c_sam0_driver_api);\
static void i2c_sam_irq_config_##n(struct device *dev) \ static void i2c_sam_irq_config_##n(struct device *dev) \
{ \ { \
IRQ_CONNECT(DT_ATMEL_SAM0_I2C_SERCOM_##n##_IRQ, \ IRQ_CONNECT(DT_ATMEL_SAM0_I2C_SERCOM_##n##_IRQ_0, \
DT_ATMEL_SAM0_I2C_SERCOM_##n##_IRQ_PRIORITY, \ DT_ATMEL_SAM0_I2C_SERCOM_##n##_IRQ_0_PRIORITY, \
i2c_sam0_isr, DEVICE_GET(i2c_sam0_##n), \ i2c_sam0_isr, DEVICE_GET(i2c_sam0_##n), \
0); \ 0); \
irq_enable(DT_ATMEL_SAM0_I2C_SERCOM_##n##_IRQ); \ irq_enable(DT_ATMEL_SAM0_I2C_SERCOM_##n##_IRQ_0); \
} }
#if DT_ATMEL_SAM0_I2C_SERCOM_0_BASE_ADDRESS #if DT_ATMEL_SAM0_I2C_SERCOM_0_BASE_ADDRESS

8
drivers/serial/uart_nrfx_uart.c
View file

@ -724,7 +724,7 @@ static void uart_nrfx_irq_tx_enable(struct device *dev)
/* Due to HW limitation first TXDRDY interrupt shall be /* Due to HW limitation first TXDRDY interrupt shall be
* triggered by the software. * triggered by the software.
*/ */
NVIC_SetPendingIRQ(DT_NORDIC_NRF_UART_UART_0_IRQ); NVIC_SetPendingIRQ(DT_NORDIC_NRF_UART_UART_0_IRQ_0);
} }
irq_unlock(key); irq_unlock(key);
} }
@ -897,12 +897,12 @@ static int uart_nrfx_init(struct device *dev)
#if defined(CONFIG_UART_0_ASYNC) || defined(CONFIG_UART_0_INTERRUPT_DRIVEN) #if defined(CONFIG_UART_0_ASYNC) || defined(CONFIG_UART_0_INTERRUPT_DRIVEN)
IRQ_CONNECT(DT_NORDIC_NRF_UART_UART_0_IRQ, IRQ_CONNECT(DT_NORDIC_NRF_UART_UART_0_IRQ_0,
DT_NORDIC_NRF_UART_UART_0_IRQ_PRIORITY, DT_NORDIC_NRF_UART_UART_0_IRQ_0_PRIORITY,
uart_nrfx_isr, uart_nrfx_isr,
DEVICE_GET(uart_nrfx_uart0), DEVICE_GET(uart_nrfx_uart0),
0); 0);
irq_enable(DT_NORDIC_NRF_UART_UART_0_IRQ); irq_enable(DT_NORDIC_NRF_UART_UART_0_IRQ_0);
#endif #endif
#ifdef CONFIG_UART_0_ASYNC #ifdef CONFIG_UART_0_ASYNC

8
drivers/serial/uart_nrfx_uarte.c
View file

@ -1263,19 +1263,19 @@ static int uarte_nrfx_pm_control(struct device *dev, u32_t ctrl_command,
COND_CODE_1(IS_ENABLED(CONFIG_UART_##idx##_INTERRUPT_DRIVEN), \ COND_CODE_1(IS_ENABLED(CONFIG_UART_##idx##_INTERRUPT_DRIVEN), \
(IRQ_CONNECT( \ (IRQ_CONNECT( \
NRFX_IRQ_NUMBER_GET(NRF_UARTE##idx), \ NRFX_IRQ_NUMBER_GET(NRF_UARTE##idx), \
DT_NORDIC_NRF_UARTE_UART_##idx##_IRQ_PRIORITY, \ DT_NORDIC_NRF_UARTE_UART_##idx##_IRQ_0_PRIORITY, \
uarte_nrfx_isr_int, \ uarte_nrfx_isr_int, \
DEVICE_GET(uart_nrfx_uarte##idx), \ DEVICE_GET(uart_nrfx_uarte##idx), \
0); \ 0); \
irq_enable(DT_NORDIC_NRF_UARTE_UART_##idx##_IRQ);), ())\ irq_enable(DT_NORDIC_NRF_UARTE_UART_##idx##_IRQ_0);), ())\
COND_CODE_1(IS_ENABLED(CONFIG_UART_##idx##_ASYNC), \ COND_CODE_1(IS_ENABLED(CONFIG_UART_##idx##_ASYNC), \
(IRQ_CONNECT( \ (IRQ_CONNECT( \
NRFX_IRQ_NUMBER_GET(NRF_UARTE##idx), \ NRFX_IRQ_NUMBER_GET(NRF_UARTE##idx), \
DT_NORDIC_NRF_UARTE_UART_##idx##_IRQ_PRIORITY, \ DT_NORDIC_NRF_UARTE_UART_##idx##_IRQ_0_PRIORITY, \
uarte_nrfx_isr_async, \ uarte_nrfx_isr_async, \
DEVICE_GET(uart_nrfx_uarte##idx), \ DEVICE_GET(uart_nrfx_uarte##idx), \
0); \ 0); \
irq_enable(DT_NORDIC_NRF_UARTE_UART_##idx##_IRQ);), ())\ irq_enable(DT_NORDIC_NRF_UARTE_UART_##idx##_IRQ_0);), ())\
return uarte_instance_init( \ return uarte_instance_init( \
dev, \ dev, \
&init_config, \ &init_config, \

16
drivers/serial/uart_rv32m1_lpuart.c
View file

@ -326,10 +326,10 @@ DEVICE_AND_API_INIT(uart_0, DT_OPENISA_RV32M1_LPUART_UART_0_LABEL,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_0(struct device *dev) static void rv32m1_lpuart_config_func_0(struct device *dev)
{ {
IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_UART_0_IRQ, DT_OPENISA_RV32M1_LPUART_UART_0_IRQ_PRI, rv32m1_lpuart_isr, IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_UART_0_IRQ_0, DT_OPENISA_RV32M1_LPUART_UART_0_IRQ_PRI, rv32m1_lpuart_isr,
DEVICE_GET(uart_0), 0); DEVICE_GET(uart_0), 0);
irq_enable(DT_OPENISA_RV32M1_LPUART_UART_0_IRQ); irq_enable(DT_OPENISA_RV32M1_LPUART_UART_0_IRQ_0);
} }
#endif #endif
@ -367,10 +367,10 @@ DEVICE_AND_API_INIT(uart_1, DT_OPENISA_RV32M1_LPUART_UART_1_LABEL,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_1(struct device *dev) static void rv32m1_lpuart_config_func_1(struct device *dev)
{ {
IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_UART_1_IRQ, DT_OPENISA_RV32M1_LPUART_UART_1_IRQ_PRI, rv32m1_lpuart_isr, IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_UART_1_IRQ_0, DT_OPENISA_RV32M1_LPUART_UART_1_IRQ_PRI, rv32m1_lpuart_isr,
DEVICE_GET(uart_1), 0); DEVICE_GET(uart_1), 0);
irq_enable(DT_OPENISA_RV32M1_LPUART_UART_1_IRQ); irq_enable(DT_OPENISA_RV32M1_LPUART_UART_1_IRQ_0);
} }
#endif #endif
@ -408,10 +408,10 @@ DEVICE_AND_API_INIT(uart_2, DT_OPENISA_RV32M1_LPUART_UART_2_LABEL,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_2(struct device *dev) static void rv32m1_lpuart_config_func_2(struct device *dev)
{ {
IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_UART_2_IRQ, DT_OPENISA_RV32M1_LPUART_UART_2_IRQ_PRI, rv32m1_lpuart_isr, IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_UART_2_IRQ_0, DT_OPENISA_RV32M1_LPUART_UART_2_IRQ_PRI, rv32m1_lpuart_isr,
DEVICE_GET(uart_2), 0); DEVICE_GET(uart_2), 0);
irq_enable(DT_OPENISA_RV32M1_LPUART_UART_2_IRQ); irq_enable(DT_OPENISA_RV32M1_LPUART_UART_2_IRQ_0);
} }
#endif #endif
@ -449,10 +449,10 @@ DEVICE_AND_API_INIT(uart_3, DT_OPENISA_RV32M1_LPUART_3_LABEL,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_3(struct device *dev) static void rv32m1_lpuart_config_func_3(struct device *dev)
{ {
IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_UART_3_IRQ, DT_OPENISA_RV32M1_LPUART_UART_3_IRQ_PRI, rv32m1_lpuart_isr, IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_UART_3_IRQ_0, DT_OPENISA_RV32M1_LPUART_UART_3_IRQ_PRI, rv32m1_lpuart_isr,
DEVICE_GET(uart_3), 0); DEVICE_GET(uart_3), 0);
irq_enable(DT_OPENISA_RV32M1_LPUART_UART_3_IRQ); irq_enable(DT_OPENISA_RV32M1_LPUART_UART_3_IRQ_0);
} }
#endif #endif

6
drivers/serial/uart_sam0.c
View file

@ -912,11 +912,11 @@ static void uart_sam0_irq_config_##n(struct device *dev)
#define UART_SAM0_IRQ_HANDLER(n) \ #define UART_SAM0_IRQ_HANDLER(n) \
static void uart_sam0_irq_config_##n(struct device *dev) \ static void uart_sam0_irq_config_##n(struct device *dev) \
{ \ { \
IRQ_CONNECT(DT_ATMEL_SAM0_UART_SERCOM_##n##_IRQ, \ IRQ_CONNECT(DT_ATMEL_SAM0_UART_SERCOM_##n##_IRQ_0, \
DT_ATMEL_SAM0_UART_SERCOM_##n##_IRQ_PRIORITY, \ DT_ATMEL_SAM0_UART_SERCOM_##n##_IRQ_0_PRIORITY, \
uart_sam0_isr, DEVICE_GET(uart_sam0_##n), \ uart_sam0_isr, DEVICE_GET(uart_sam0_##n), \
0); \ 0); \
irq_enable(DT_ATMEL_SAM0_UART_SERCOM_##n##_IRQ); \ irq_enable(DT_ATMEL_SAM0_UART_SERCOM_##n##_IRQ_0); \
} }
#else #else
#define UART_SAM0_IRQ_HANDLER_DECL(n) #define UART_SAM0_IRQ_HANDLER_DECL(n)

16
drivers/spi/spi_mcux_lpspi.c
View file

@ -293,10 +293,10 @@ DEVICE_AND_API_INIT(spi_mcux_0, DT_NXP_IMX_LPSPI_SPI_0_LABEL, &spi_mcux_init,
static void spi_mcux_config_func_0(struct device *dev) static void spi_mcux_config_func_0(struct device *dev)
{ {
IRQ_CONNECT(DT_NXP_IMX_LPSPI_SPI_0_IRQ, DT_NXP_IMX_LPSPI_SPI_0_IRQ_PRIORITY, IRQ_CONNECT(DT_NXP_IMX_LPSPI_SPI_0_IRQ_0, DT_NXP_IMX_LPSPI_SPI_0_IRQ_0_PRIORITY,
spi_mcux_isr, DEVICE_GET(spi_mcux_0), 0); spi_mcux_isr, DEVICE_GET(spi_mcux_0), 0);
irq_enable(DT_NXP_IMX_LPSPI_SPI_0_IRQ); irq_enable(DT_NXP_IMX_LPSPI_SPI_0_IRQ_0);
} }
#endif /* SPI_0 */ #endif /* SPI_0 */
@ -322,10 +322,10 @@ DEVICE_AND_API_INIT(spi_mcux_1, DT_NXP_IMX_LPSPI_SPI_1_LABEL, &spi_mcux_init,
static void spi_mcux_config_func_1(struct device *dev) static void spi_mcux_config_func_1(struct device *dev)
{ {
IRQ_CONNECT(DT_NXP_IMX_LPSPI_SPI_1_IRQ, DT_NXP_IMX_LPSPI_SPI_1_IRQ_PRIORITY, IRQ_CONNECT(DT_NXP_IMX_LPSPI_SPI_1_IRQ_0, DT_NXP_IMX_LPSPI_SPI_1_IRQ_0_PRIORITY,
spi_mcux_isr, DEVICE_GET(spi_mcux_1), 0); spi_mcux_isr, DEVICE_GET(spi_mcux_1), 0);
irq_enable(DT_NXP_IMX_LPSPI_SPI_1_IRQ); irq_enable(DT_NXP_IMX_LPSPI_SPI_1_IRQ_0);
} }
#endif /* SPI_1 */ #endif /* SPI_1 */
@ -351,10 +351,10 @@ DEVICE_AND_API_INIT(spi_mcux_2, DT_NXP_IMX_LPSPI_SPI_2_LABEL, &spi_mcux_init,
static void spi_mcux_config_func_2(struct device *dev) static void spi_mcux_config_func_2(struct device *dev)
{ {
IRQ_CONNECT(DT_NXP_IMX_LPSPI_SPI_2_IRQ, DT_NXP_IMX_LPSPI_SPI_2_IRQ_PRIORITY, IRQ_CONNECT(DT_NXP_IMX_LPSPI_SPI_2_IRQ_0, DT_NXP_IMX_LPSPI_SPI_2_IRQ_0_PRIORITY,
spi_mcux_isr, DEVICE_GET(spi_mcux_2), 0); spi_mcux_isr, DEVICE_GET(spi_mcux_2), 0);
irq_enable(DT_NXP_IMX_LPSPI_SPI_2_IRQ); irq_enable(DT_NXP_IMX_LPSPI_SPI_2_IRQ_0);
} }
#endif /* SPI_2 */ #endif /* SPI_2 */
@ -380,9 +380,9 @@ DEVICE_AND_API_INIT(spi_mcux_3, DT_NXP_IMX_LPSPI_SPI_3_LABEL, &spi_mcux_init,
static void spi_mcux_config_func_3(struct device *dev) static void spi_mcux_config_func_3(struct device *dev)
{ {
IRQ_CONNECT(DT_NXP_IMX_LPSPI_SPI_3_IRQ, DT_NXP_IMX_LPSPI_SPI_3_IRQ_PRIORITY, IRQ_CONNECT(DT_NXP_IMX_LPSPI_SPI_3_IRQ_0, DT_NXP_IMX_LPSPI_SPI_3_IRQ_0_PRIORITY,
spi_mcux_isr, DEVICE_GET(spi_mcux_3), 0); spi_mcux_isr, DEVICE_GET(spi_mcux_3), 0);
irq_enable(DT_NXP_IMX_LPSPI_SPI_3_IRQ); irq_enable(DT_NXP_IMX_LPSPI_SPI_3_IRQ_0);
} }
#endif /* CONFIG_SPI_3 */ #endif /* CONFIG_SPI_3 */

2
drivers/spi/spi_nrfx_spi.c
View file

@ -275,7 +275,7 @@ static int init_spi(struct device *dev, const nrfx_spi_config_t *config)
static int spi_##idx##_init(struct device *dev) \ static int spi_##idx##_init(struct device *dev) \
{ \ { \
IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_SPI##idx), \ IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_SPI##idx), \
DT_NORDIC_NRF_SPI_SPI_##idx##_IRQ_PRIORITY, \ DT_NORDIC_NRF_SPI_SPI_##idx##_IRQ_0_PRIORITY, \
nrfx_isr, nrfx_spi_##idx##_irq_handler, 0); \ nrfx_isr, nrfx_spi_##idx##_irq_handler, 0); \
const nrfx_spi_config_t config = { \ const nrfx_spi_config_t config = { \
.sck_pin = DT_NORDIC_NRF_SPI_SPI_##idx##_SCK_PIN, \ .sck_pin = DT_NORDIC_NRF_SPI_SPI_##idx##_SCK_PIN, \

2
drivers/spi/spi_nrfx_spim.c
View file

@ -321,7 +321,7 @@ static int init_spim(struct device *dev, const nrfx_spim_config_t *config)
static int spi_##idx##_init(struct device *dev) \ static int spi_##idx##_init(struct device *dev) \
{ \ { \
IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_SPIM##idx), \ IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_SPIM##idx), \
DT_NORDIC_NRF_SPI_SPI_##idx##_IRQ_PRIORITY, \ DT_NORDIC_NRF_SPI_SPI_##idx##_IRQ_0_PRIORITY, \
nrfx_isr, nrfx_spim_##idx##_irq_handler, 0); \ nrfx_isr, nrfx_spim_##idx##_irq_handler, 0); \
const nrfx_spim_config_t config = { \ const nrfx_spim_config_t config = { \
.sck_pin = DT_NORDIC_NRF_SPI_SPI_##idx##_SCK_PIN, \ .sck_pin = DT_NORDIC_NRF_SPI_SPI_##idx##_SCK_PIN, \

2
drivers/spi/spi_nrfx_spis.c
View file

@ -251,7 +251,7 @@ static int init_spis(struct device *dev, const nrfx_spis_config_t *config)
static int spi_##idx##_init(struct device *dev) \ static int spi_##idx##_init(struct device *dev) \
{ \ { \
IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_SPIS##idx), \ IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_SPIS##idx), \
DT_NORDIC_NRF_SPIS_SPI_##idx##_IRQ_PRIORITY, \ DT_NORDIC_NRF_SPIS_SPI_##idx##_IRQ_0_PRIORITY, \
nrfx_isr, nrfx_spis_##idx##_irq_handler, 0); \ nrfx_isr, nrfx_spis_##idx##_irq_handler, 0); \
const nrfx_spis_config_t config = { \ const nrfx_spis_config_t config = { \
.sck_pin = DT_NORDIC_NRF_SPIS_SPI_##idx##_SCK_PIN, \ .sck_pin = DT_NORDIC_NRF_SPIS_SPI_##idx##_SCK_PIN, \

4
drivers/timer/rv32m1_lptmr_timer.c
View file

@ -56,7 +56,7 @@ int z_clock_driver_init(struct device *unused)
u32_t csr, psr, sircdiv; /* LPTMR registers */ u32_t csr, psr, sircdiv; /* LPTMR registers */
ARG_UNUSED(unused); ARG_UNUSED(unused);
IRQ_CONNECT(DT_OPENISA_RV32M1_LPTMR_SYSTEM_LPTMR_IRQ, IRQ_CONNECT(DT_OPENISA_RV32M1_LPTMR_SYSTEM_LPTMR_IRQ_0,
SYSTEM_TIMER_IRQ_PRIO, lptmr_irq_handler, NULL, 0); SYSTEM_TIMER_IRQ_PRIO, lptmr_irq_handler, NULL, 0);
if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCEN_MASK) == SCG_SIRCCSR_SIRCEN(0)) { if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCEN_MASK) == SCG_SIRCCSR_SIRCEN(0)) {
@ -122,7 +122,7 @@ int z_clock_driver_init(struct device *unused)
* Enable interrupts and the timer. There's no need to clear the * Enable interrupts and the timer. There's no need to clear the
* TFC bit in the csr variable, as it's already clear. * TFC bit in the csr variable, as it's already clear.
*/ */
irq_enable(DT_OPENISA_RV32M1_LPTMR_SYSTEM_LPTMR_IRQ); irq_enable(DT_OPENISA_RV32M1_LPTMR_SYSTEM_LPTMR_IRQ_0);
csr = SYSTEM_TIMER_INSTANCE->CSR; csr = SYSTEM_TIMER_INSTANCE->CSR;
csr |= LPTMR_CSR_TEN(1); csr |= LPTMR_CSR_TEN(1);
SYSTEM_TIMER_INSTANCE->CSR = csr; SYSTEM_TIMER_INSTANCE->CSR = csr;

4
drivers/usb/device/usb_dc_nrfx.c
View file

@ -1306,8 +1306,8 @@ int usb_dc_attach(void)
k_work_init(&ctx->usb_work, usbd_work_handler); k_work_init(&ctx->usb_work, usbd_work_handler);
k_mutex_init(&ctx->drv_lock); k_mutex_init(&ctx->drv_lock);
IRQ_CONNECT(DT_NORDIC_NRF_USBD_USBD_0_IRQ, IRQ_CONNECT(DT_NORDIC_NRF_USBD_USBD_0_IRQ_0,
DT_NORDIC_NRF_USBD_USBD_0_IRQ_PRIORITY, DT_NORDIC_NRF_USBD_USBD_0_IRQ_0_PRIORITY,
nrfx_isr, nrfx_usbd_irq_handler, 0); nrfx_isr, nrfx_usbd_irq_handler, 0);
err = nrfx_usbd_init(usbd_event_handler); err = nrfx_usbd_init(usbd_event_handler);

6
drivers/watchdog/wdt_nrfx.c
View file

@ -162,10 +162,10 @@ static int init_wdt(struct device *dev)
return -EBUSY; return -EBUSY;
} }
IRQ_CONNECT(DT_NORDIC_NRF_WATCHDOG_WDT_0_IRQ, IRQ_CONNECT(DT_NORDIC_NRF_WATCHDOG_WDT_0_IRQ_0,
DT_NORDIC_NRF_WATCHDOG_WDT_0_IRQ_PRIORITY, DT_NORDIC_NRF_WATCHDOG_WDT_0_IRQ_0_PRIORITY,
nrfx_isr, nrfx_wdt_irq_handler, 0); nrfx_isr, nrfx_wdt_irq_handler, 0);
irq_enable(DT_NORDIC_NRF_WATCHDOG_WDT_0_IRQ); irq_enable(DT_NORDIC_NRF_WATCHDOG_WDT_0_IRQ_0);
return 0; return 0;
} }