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soc: stm32l0: Clear LPSDSR when exiting STOP mode

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Clear the LPSDSR bit of PWR_CR to restore the voltage regulator
mode when exiting from STOP mode. Leaving LPSDSR set can cause
cause stability issues because the MCU will enter low-power sleep mode
instead of normal sleep mode when the core idles and this is not what
the rest of the implementation expects.

Signed-off-by: Alexander Mihajlovic <a@abxy.se>
This commit is contained in:
Alexander Mihajlovic 2022-01-24 10:26:14 +01:00 • committed by Carles Cufí
commit dafc4383fd
1 changed files with 1 additions and 0 deletions
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soc/arm/st_stm32/stm32l0/power.c
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@ -58,6 +58,7 @@ __weak void pm_power_state_exit_post_ops(struct pm_state_info info)
case PM_STATE_SUSPEND_TO_IDLE: case PM_STATE_SUSPEND_TO_IDLE:
LL_LPM_DisableSleepOnExit(); LL_LPM_DisableSleepOnExit();
LL_LPM_EnableSleep(); LL_LPM_EnableSleep();
LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN);
/* Restore the clock setup. */ /* Restore the clock setup. */
stm32_clock_control_init(NULL); stm32_clock_control_init(NULL);