diff --git a/soc/andestech/ae350/Kconfig b/soc/andestech/ae350/Kconfig
index bfe38058e1c..4d466048e84 100644
--- a/soc/andestech/ae350/Kconfig
+++ b/soc/andestech/ae350/Kconfig
@@ -91,6 +91,7 @@ config SOC_ANDES_V5_EXECIT
 config SOC_ANDES_V5_PMA
 	bool "Andes V5 Physical Memory Attribute (PMA)"
 	select ARCH_HAS_NOCACHE_MEMORY_SUPPORT
+	select SOC_EARLY_INIT_HOOK
 	help
 		This option enables the Andes V5 PMA, in order to support SW to
 		configure physical memory attribute by PMA CSRs. The address
diff --git a/soc/andestech/ae350/pma.c b/soc/andestech/ae350/pma.c
index 9847ba622eb..0fb162cc959 100644
--- a/soc/andestech/ae350/pma.c
+++ b/soc/andestech/ae350/pma.c
@@ -201,7 +201,7 @@ void pma_init_per_core(void)
 #endif /* CONFIG_NOCACHE_MEMORY */
 }
 
-static int pma_init(void)
+void soc_early_init_hook(void)
 {
 	unsigned long mmsc_cfg;
 
@@ -220,8 +220,4 @@ static int pma_init(void)
 	}
 
 	pma_init_per_core();
-
-	return 0;
 }
-
-SYS_INIT(pma_init, PRE_KERNEL_2, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);