interrupts: new static IRQ API

The interrupt API has been redesigned:

- irq_connect() for dynamic interrupts renamed to irq_connect_dynamic().
  It will be used in situations where the new static irq_connect()
  won't work, i.e. the value of arguments can't be computed at build time
- a new API for static interrupts replaces irq_connect(). it is used
  exactly the same way as its dynamic counterpart. The old static irq
  macros will be removed
- Separate stub assembly files are no longer needed as the stubs are now
  generated inline with irq_connect()

ReST documentation updated for the changed API. Some detail about the
IDT in ROM added, and an oblique reference to the internal-only
_irq_handler_set() API removed; we don't talk about internal APIs in
the official documentation.

Change-Id: I280519993da0e0fe671eb537a876f67de33d3cd4
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2016-01-08 00:46:14 -08:00 committed by Anas Nashif
commit d9cfbd5a61
70 changed files with 347 additions and 923 deletions

View file

@ -155,7 +155,7 @@ void _irq_spurious(void *unused)
* @return the interrupt line number
*/
int irq_connect(
int irq_connect_dynamic(
unsigned int irq,
unsigned int prio,
void (*isr)(void *arg),

View file

@ -22,12 +22,10 @@
#include <ipm.h>
#include <ipm/ipm_quark_se.h>
IRQ_CONNECT_STATIC(quark_se_ipm, QUARK_SE_IPM_INTERRUPT,
QUARK_SE_IPM_INTERRUPT_PRI, quark_se_ipm_isr, NULL, 0);
static int arc_quark_se_ipm_init(void)
{
IRQ_CONFIG(quark_se_ipm, QUARK_SE_IPM_INTERRUPT);
irq_connect(QUARK_SE_IPM_INTERRUPT, QUARK_SE_IPM_INTERRUPT_PRI,
quark_se_ipm_isr, NULL, 0);
irq_enable(QUARK_SE_IPM_INTERRUPT);
return DEV_OK;
}

View file

@ -136,7 +136,7 @@ void _irq_spurious(void *unused)
*
* @return the interrupt line number
*/
int irq_connect(unsigned int irq,
int irq_connect_dynamic(unsigned int irq,
unsigned int prio,
void (*isr)(void *arg),
void *arg,

View file

@ -20,8 +20,7 @@ endif
obj-y += gdt.o fatal.o cpuhalt.o \
msr.o dynamic.o intconnect.o \
excconnect.o sys_fatal_error_handler.o \
crt0.o driver_static_irq_stubs.o \
atomic.o cache_s.o cache.o excstub.o
crt0.o atomic.o cache_s.o cache.o excstub.o
obj-$(CONFIG_IRQ_OFFLOAD) += irq_offload.o
obj-$(CONFIG_FP_SHARING) += float.o

View file

@ -1,43 +0,0 @@
/*
* Copyright (c) 2012-2015, Wind River Systems, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file
* @brief Interrupt stubs
*
* This module contains the static interrupt stubs for the various drivers employed
* by x86 platforms.
*/
#define _ASMLANGUAGE
#include <arch/x86/asm.h>
#include <drivers/ioapic.h>
#include <drivers/loapic.h>
#include <drivers/system_timer.h>
#if defined(CONFIG_LOAPIC_TIMER)
loapic_mkstub loapic _timer_int_handler 0
#endif
#if defined(CONFIG_HPET_TIMER)
ioapic_mkstub hpet _timer_int_handler 0
#endif
/* externs (internal APIs) */
GTEXT(_IntEnt)
GTEXT(_IntExit)

View file

@ -202,7 +202,7 @@ extern void *_DynIntStubsBegin;
* vectors remaining in the specified <priority> level.
*/
int irq_connect(unsigned int irq, unsigned int priority,
int irq_connect_dynamic(unsigned int irq, unsigned int priority,
void (*routine)(void *parameter), void *parameter,
uint32_t flags)
{

View file

@ -27,12 +27,10 @@
#include <ipm.h>
#include <ipm/ipm_quark_se.h>
IRQ_CONNECT_STATIC(quark_se_ipm, QUARK_SE_IPM_INTERRUPT, QUARK_SE_IPM_INTERRUPT_PRI,
quark_se_ipm_isr, NULL, 0);
static int x86_quark_se_ipm_init(void)
{
IRQ_CONFIG(quark_se_ipm, QUARK_SE_IPM_INTERRUPT);
irq_connect(QUARK_SE_IPM_INTERRUPT, QUARK_SE_IPM_INTERRUPT_PRI,
quark_se_ipm_isr, NULL, 0);
irq_enable(QUARK_SE_IPM_INTERRUPT);
return DEV_OK;
}

View file

@ -95,7 +95,8 @@ Example
#define MY_DEV_IRQ 24 /* device uses IRQ 24 */
#define MY_DEV_PRIO 2 /* device uses interrupt priority 2 */
#define MY_ISR_ARG 17 /* argument passed to my_isr() */
/* argument passed to my_isr(), in this case a pointer to the device */
#define MY_ISR_ARG SYS_GET_DEVICE(my_device)
#define MY_IRQ_FLAGS 0 /* IRQ flags. Unused on non-x86 */
void my_isr(void *arg)
@ -103,23 +104,14 @@ Example
... /* ISR code */
}
IRQ_CONNECT_STATIC(my_dev, MY_DEV_IRQ, MY_DEV_PRIO, my_isr, MY_ISR_ARG,
MY_IRQ_FLAGS);
void my_isr_installer(void)
{
...
IRQ_CONFIG(my_dev, MY_DEV_IRQ); /* finish IRQ configuration */
irq_connect(MY_DEV_IRQ, MY_DEV_PRIO, my_isr, MY_ISR_ARG, MY_IRQ_FLAGS);
irq_enable(MY_DEV_IRQ); /* enable IRQ */
...
}
For x86 platforms only, you must also create an interrupt stub as follows:
.. code-block:: asm
ioapic_mkstub my_dev my_isr
Installing a Dynamic ISR
========================
@ -127,11 +119,6 @@ Use a dynamic ISR to register an interrupt handler when the interrupt
parameters can be found out only at runtime, or when a device is not always
present in the system.
.. note::
There is no API method to uninstall a dynamic ISR; however, it is
possible to replace it with a different dynamic ISR.
Prerequisites
-------------
@ -161,7 +148,8 @@ This is an example of a dynamic interrupt for x86:
void my_isr_installer(void)
{
...
irq_connect(MY_DEV_IRQ, MY_DEV_PRIO, my_isr, MY_ISR_ARG, MY_IRQ_FLAGS);
irq_connect_dynamic(MY_DEV_IRQ, MY_DEV_PRIO, my_isr, MY_ISR_ARG,
MY_IRQ_FLAGS);
...
irq_enable(MY_DEV_IRQ);
...
@ -235,20 +223,18 @@ IDT Security
Ideally, the IDT memory area should be protected against accidental
modification, in the same way that text and read-only data areas
are protected.
Currently, the IDT is always located read-write memory and is
therefore *not* protected. This is true even for systems using
:abbr:`XIP (Execute in Place)`, where the text and read-only data areas
reside in read-only memory (such as flash memory or ROM).
are protected. If no dynamic interrupts are in use, i.e.
:option:`NUM_DYNAMIC_STUBS` is 0, the IDT will be located in ROM.
If a particular project is ROM space-constrained, it's possible to
force the IDT to be located in RAM via :option:`FORCE_IRQ_VECTOR_TABLE_RAM`.
APIs
****
These are the interrupt-related Application Program Interfaces.
:c:func:`irq_connect()`
:c:func:`irq_connect_dynamic()`
Registers a dynamic ISR with the IDT and interrupt controller.
:c:func:`irq_enable()`
@ -268,8 +254,6 @@ Macros
These are the macros used to install a static ISR.
:c:macro:`IRQ_CONNECT_STATIC( )`
:c:macro:`irq_connect()`
Registers a static ISR with the IDT.
:c:macro:`IRQ_CONFIG( )`
Registers a static ISR with the interrupt controller.

View file

@ -277,7 +277,7 @@ For example, if 3 bits are implemented, use 1, 2, and 3,
not 0x20h, 0x40h, and 0x60h.
Interrupt priority is set using the *prio* parameter of
:c:func:`irq_connect()`.
:c:macro:`irq_connect()` or :c:func:`irq_connect_dynamic()`.
The range of available priorities is different if using Zero Latency Interrupts
(ZLI) or not.

View file

@ -53,7 +53,7 @@
#else
#define int_unmask(...) { ; }
#endif
static void adc_config_0_irq(struct device *dev);
static void adc_config_0_irq(void);
static void adc_goto_normal_mode_wo_calibration(void)
{
@ -259,7 +259,7 @@ int adc_dw_init(struct device *dev)
sys_out32(ADC_INT_ENABLE & ~(ADC_CLK_ENABLE),
adc_base + ADC_CTRL);
config->config_func(dev);
config->config_func();
int_unmask(config->reg_irq_mask);
int_unmask(config->reg_err_mask);
@ -340,8 +340,6 @@ struct adc_config adc_config_dev_0 = {
.reg_base = PERIPH_ADDR_BASE_ADC,
.reg_irq_mask = SCSS_REGISTER_BASE + INT_SS_ADC_IRQ_MASK,
.reg_err_mask = SCSS_REGISTER_BASE + INT_SS_ADC_ERR_MASK,
.rx_vector = CONFIG_ADC_DW_0_RX_IRQ,
.err_vector = CONFIG_ADC_DW_0_ERR_IRQ,
#ifdef CONFIG_ADC_DW_SINGLE_ENDED
.in_mode = 0,
#elif CONFIG_ADC_DW_DIFFERENTIAL
@ -376,25 +374,14 @@ DECLARE_DEVICE_INIT_CONFIG(adc_dw_0, /* config name*/
SYS_DEFINE_DEVICE(adc_dw_0, &adc_info_dev_0, SECONDARY,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
IRQ_CONNECT_STATIC(adc_dw_0_rx,
CONFIG_ADC_DW_0_RX_IRQ,
CONFIG_ADC_DW_0_PRI,
adc_dw_rx_isr,
SYS_GET_DEVICE(adc_dw_0), 0);
IRQ_CONNECT_STATIC(adc_dw_0_err,
CONFIG_ADC_DW_0_ERR_IRQ,
CONFIG_ADC_DW_0_PRI,
adc_dw_err_isr,
SYS_GET_DEVICE(adc_dw_0), 0);
static void adc_config_0_irq(struct device *dev)
static void adc_config_0_irq(void)
{
struct adc_config *config = dev->config->config_info;
irq_connect(CONFIG_ADC_DW_0_RX_IRQ, CONFIG_ADC_DW_0_PRI, adc_dw_rx_isr,
SYS_GET_DEVICE(adc_dw_0), 0);
irq_enable(CONFIG_ADC_DW_0_RX_IRQ);
IRQ_CONFIG(adc_dw_0_rx, CONFIG_ADC_DW_0_RX_IRQ);
irq_enable(config->rx_vector);
IRQ_CONFIG(adc_dw_0_err, CONFIG_ADC_DW_0_ERR_IRQ);
irq_enable(config->err_vector);
irq_connect(CONFIG_ADC_DW_0_ERR_IRQ, CONFIG_ADC_DW_0_PRI,
adc_dw_err_isr, SYS_GET_DEVICE(adc_dw_0), 0);
irq_enable(CONFIG_ADC_DW_0_ERR_IRQ);
}
#endif

View file

@ -145,7 +145,7 @@
#define ss_adc_data_to_mv(_data_, _resolution_) \
((_data_ * ADC_VREF) / (1 << _resolution_))
typedef void (*adc_dw_config_t)(struct device *dev);
typedef void (*adc_dw_config_t)(void);
/** @brief ADC configuration
* This structure defines the ADC configuration values
* that define the ADC hardware instance and configuration.
@ -157,10 +157,6 @@ struct adc_config {
uint32_t reg_irq_mask;
/**IIO address for the error mask register.*/
uint32_t reg_err_mask;
/**Interruption vector for the reception ISR.*/
uint8_t rx_vector;
/**Interruption vector for the error ISR.*/
uint8_t err_vector;
/**Input mode*/
uint8_t in_mode;
/**Output mode*/

View file

@ -1 +1 @@
obj-$(CONFIG_AIO_DW_COMPARATOR) += aio_dw_comparator.o aio_static_irq_stubs.o
obj-$(CONFIG_AIO_DW_COMPARATOR) += aio_dw_comparator.o

View file

@ -213,20 +213,11 @@ struct dw_aio_cmp_dev_data_t dw_aio_cmp_dev_data = {
SYS_DEFINE_DEVICE(dw_aio_cmp, &dw_aio_cmp_dev_data, SECONDARY,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
struct device *dw_aio_cmp_device = SYS_GET_DEVICE(dw_aio_cmp);
IRQ_CONNECT_STATIC(dw_aio_cmp,
INT_AIO_CMP_IRQ,
0,
dw_aio_cmp_isr,
0,
0);
static int dw_aio_cmp_config(struct device *dev)
{
ARG_UNUSED(dev);
IRQ_CONFIG(dw_aio_cmp, INT_AIO_CMP_IRQ);
irq_connect(INT_AIO_CMP_IRQ, 0, dw_aio_cmp_isr,
SYS_GET_DEVICE(dw_aio_cmp), 0);
return DEV_OK;
}

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@ -1,34 +0,0 @@
/*
* Copyright (c) 2015, Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file
* @brief AIO interrupt stubs
* This module contains the static interrupt stubs for the aio driver
*/
#define _ASMLANGUAGE
#ifdef CONFIG_X86
#include <arch/x86/asm.h>
#include <drivers/ioapic.h>
#endif
#if defined(CONFIG_AIO_DW_COMPARATOR)
#if defined(CONFIG_IOAPIC)
ioapic_mkstub dw_aio_cmp dw_aio_cmp_isr dw_aio_cmp_device
#endif
#endif /* CONFIG_AIO_DW_COMPARATOR */

View file

@ -1,2 +1,2 @@
obj-$(CONFIG_BLUETOOTH_H4) += h4.o uart_static_irq_stubs.o
obj-$(CONFIG_BLUETOOTH_H5) += h5.o uart_static_irq_stubs.o
obj-$(CONFIG_BLUETOOTH_H4) += h4.o
obj-$(CONFIG_BLUETOOTH_H5) += h5.o

View file

@ -218,17 +218,14 @@ static int h4_send(enum bt_buf_type buf_type, struct net_buf *buf)
return 0;
}
IRQ_CONNECT_STATIC(bluetooth, CONFIG_BLUETOOTH_UART_IRQ,
CONFIG_BLUETOOTH_UART_IRQ_PRI, bt_uart_isr, 0,
UART_IRQ_FLAGS);
static int h4_open(void)
{
BT_DBG("");
uart_irq_rx_disable(h4_dev);
uart_irq_tx_disable(h4_dev);
IRQ_CONFIG(bluetooth, CONFIG_BLUETOOTH_UART_IRQ);
irq_connect(CONFIG_BLUETOOTH_UART_IRQ, CONFIG_BLUETOOTH_UART_IRQ_PRI,
bt_uart_isr, 0, UART_IRQ_FLAGS);
irq_enable(CONFIG_BLUETOOTH_UART_IRQ);
/* Drain the fifo */

View file

@ -768,17 +768,15 @@ static void h5_init(void)
nano_fifo_init(&h5.unack_queue);
}
IRQ_CONNECT_STATIC(bluetooth, CONFIG_BLUETOOTH_UART_IRQ,
CONFIG_BLUETOOTH_UART_IRQ_PRI, bt_uart_isr, 0,
UART_IRQ_FLAGS);
static int h5_open(void)
{
BT_DBG("");
uart_irq_rx_disable(h5_dev);
uart_irq_tx_disable(h5_dev);
IRQ_CONFIG(bluetooth, CONFIG_BLUETOOTH_UART_IRQ);
irq_connect(CONFIG_BLUETOOTH_UART_IRQ, CONFIG_BLUETOOTH_UART_IRQ_PRI,
bt_uart_isr, 0, UART_IRQ_FLAGS);
irq_enable(CONFIG_BLUETOOTH_UART_IRQ);
/* Drain the fifo */

View file

@ -1,38 +0,0 @@
/*
* Copyright (c) 2015, Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file
* @brief Bluetooth UART interrupt stubs
*/
#ifdef CONFIG_X86
#define _ASMLANGUAGE
#include <arch/x86/asm.h>
#include <drivers/ioapic.h>
#include <drivers/loapic.h>
#if defined(CONFIG_BLUETOOTH_UART)
#if defined(CONFIG_IOAPIC)
ioapic_mkstub bluetooth bt_uart_isr 0
#endif /* CONFIG_IOAPIC */
#endif /* CONFIG_BLUETOOTH_UART */
#undef _ASMLANGUAGE
#endif /* CONFIG_X86 */

View file

@ -1,6 +1,6 @@
obj-$(CONFIG_CONSOLE_HANDLER_SHELL) += console_handler_shell.o
obj-$(CONFIG_UART_CONSOLE) += uart_console.o uart_console_static_irq_stubs.o
obj-$(CONFIG_UART_CONSOLE) += uart_console.o
obj-$(CONFIG_RAM_CONSOLE) += ram_console.o
obj-$(CONFIG_IPM_CONSOLE_RECEIVER) += ipm_console_receiver.o
obj-$(CONFIG_IPM_CONSOLE_SENDER) += ipm_console_sender.o
obj-$(CONFIG_UART_PIPE) += uart_pipe.o uart_console_static_irq_stubs.o
obj-$(CONFIG_UART_PIPE) += uart_pipe.o

View file

@ -366,17 +366,14 @@ void uart_console_isr(void *unused)
}
}
IRQ_CONNECT_STATIC(console, CONFIG_UART_CONSOLE_IRQ,
CONFIG_UART_CONSOLE_IRQ_PRI, uart_console_isr, 0,
UART_IRQ_FLAGS);
static void console_input_init(void)
{
uint8_t c;
uart_irq_rx_disable(uart_console_dev);
uart_irq_tx_disable(uart_console_dev);
IRQ_CONFIG(console, CONFIG_UART_CONSOLE_IRQ);
irq_connect(CONFIG_UART_CONSOLE_IRQ, CONFIG_UART_CONSOLE_IRQ_PRI,
uart_console_isr, 0, UART_IRQ_FLAGS);
irq_enable(CONFIG_UART_CONSOLE_IRQ);
/* Drain the fifo */

View file

@ -1,44 +0,0 @@
/*
* Copyright (c) 2015, Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file
* @brief UART console interrupt stubs
*/
#ifdef CONFIG_X86
#define _ASMLANGUAGE
#include <arch/x86/asm.h>
#include <drivers/ioapic.h>
#include <drivers/loapic.h>
#if defined(CONFIG_CONSOLE_HANDLER)
#if defined(CONFIG_IOAPIC) || defined(CONFIG_MVIC)
ioapic_mkstub console uart_console_isr 0
#endif /* CONFIG_IOAPIC */
#endif /* CONFIG_CONSOLE_HANDLER */
#if defined(CONFIG_UART_PIPE)
#if defined(CONFIG_IOAPIC) || defined(CONFIG_MVIC)
ioapic_mkstub uart_pipe uart_pipe_isr 0
#endif /* CONFIG_IOAPIC */
#endif /* CONFIG_UART_PIPE */
#undef _ASMLANGUAGE
#endif /* CONFIG_X86 */

View file

@ -72,15 +72,13 @@ int uart_pipe_send(const uint8_t *data, int len)
}
}
IRQ_CONNECT_STATIC(uart_pipe, CONFIG_UART_PIPE_IRQ,
CONFIG_UART_PIPE_IRQ_PRI, uart_pipe_isr, 0,
UART_IRQ_FLAGS);
static void uart_pipe_setup(struct device *uart)
{
uart_irq_rx_disable(uart);
uart_irq_tx_disable(uart);
IRQ_CONFIG(uart_pipe, CONFIG_UART_PIPE_IRQ);
irq_connect(CONFIG_UART_PIPE_IRQ, CONFIG_UART_PIPE_IRQ_PRI,
uart_pipe_isr, 0, UART_IRQ_FLAGS);
irq_enable(CONFIG_UART_PIPE_IRQ);
/* Drain the fifo */

View file

@ -3,4 +3,4 @@ ccflags-y += -I${srctree}/net/ip/contiki/os/lib
ccflags-y += -I${srctree}/net/ip/contiki/os
ccflags-y += -I${srctree}
obj-$(CONFIG_ETH_DW) += eth_dw.o eth_static_irq_stubs.o
obj-$(CONFIG_ETH_DW) += eth_dw.o

View file

@ -313,11 +313,6 @@ static int eth_net_tx(struct net_buf *buf)
return eth_tx(&__initconfig_eth_dw_0, buf);
}
#ifdef CONFIG_ETH_DW_0_IRQ_DIRECT
IRQ_CONNECT_STATIC(eth_dw_0, CONFIG_ETH_DW_0_IRQ,
CONFIG_ETH_DW_0_PRI, eth_dw_isr, 0);
#endif
static void eth_config_0_irq(struct device *port)
{
struct eth_config *config = port->config->config_info;
@ -325,8 +320,9 @@ static void eth_config_0_irq(struct device *port)
#ifdef CONFIG_ETH_DW_0_IRQ_DIRECT
ARG_UNUSED(shared_irq_dev);
IRQ_CONFIG(eth_dw_0, config->irq_num);
irq_enable(config->irq_num);
irq_connect(CONFIG_ETH_DW_0_IRQ, CONFIG_ETH_DW_0_PRI, eth_dw_isr,
SYS_GET_DEVICE(eth_dw_0), 0);
irq_enable(CONFIG_ETH_DW_0_IRQ);
#elif defined(CONFIG_ETH_DW_0_IRQ_SHARED)
shared_irq_dev = device_get_binding(config->shared_irq_dev_name);
__ASSERT(shared_irq_dev != NULL, "Failed to get eth_dw device binding");
@ -334,9 +330,4 @@ static void eth_config_0_irq(struct device *port)
shared_irq_enable(shared_irq_dev, port);
#endif
}
#ifdef CONFIG_ETH_DW_0_IRQ_DIRECT
struct device *eth_dw_isr_0 = SYS_GET_DEVICE(eth_dw_0);
#endif /* CONFIG_ETH_DW_0_IRQ_DIRECT */
#endif /* CONFIG_ETH_DW_0 */

View file

@ -1,34 +0,0 @@
/*
* Copyright (c) 2015, Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file
* @brief Ethernet interrupt stubs
* This module contains the static interrupt stubs for Ethernet drivers.
*/
#define _ASMLANGUAGE
#ifdef CONFIG_X86
#include <arch/x86/asm.h>
#include <drivers/ioapic.h>
#endif
#if defined(CONFIG_ETH_DW)
#if CONFIG_ETH_DW_0
ioapic_mkstub eth_dw_0 eth_dw_isr eth_dw_isr_0
#endif /* CONFIG_ETH_DW_0 */
#endif /* CONFIG_ETH_DW */

View file

@ -1,6 +1,5 @@
ccflags-y +=-I$(srctree)/drivers
obj-$(CONFIG_GPIO) += gpio_static_irq_stubs.o
obj-$(CONFIG_GPIO_DW) += gpio_dw.o
obj-$(CONFIG_GPIO_PCAL9535A) += gpio_pcal9535a.o
obj-$(CONFIG_GPIO_MMIO) += gpio_mmio.o

View file

@ -454,14 +454,12 @@ struct gpio_dw_config gpio_config_0 = {
struct gpio_dw_runtime gpio_0_runtime;
DECLARE_DEVICE_INIT_CONFIG(gpio_0, CONFIG_GPIO_DW_0_NAME,
DECLARE_DEVICE_INIT_CONFIG(gpio_dw_0, CONFIG_GPIO_DW_0_NAME,
gpio_dw_initialize, &gpio_config_0);
SYS_DEFINE_DEVICE(gpio_0, &gpio_0_runtime, SECONDARY,
SYS_DEFINE_DEVICE(gpio_dw_0, &gpio_0_runtime, SECONDARY,
CONFIG_GPIO_DW_INIT_PRIORITY);
#ifdef CONFIG_GPIO_DW_0_IRQ_DIRECT
struct device *gpio_dw_isr_0 = SYS_GET_DEVICE(gpio_0);
#ifdef CONFIG_IOAPIC
#ifdef CONFIG_GPIO_DW_0
#if defined(CONFIG_GPIO_DW_0_FALLING_EDGE)
@ -477,11 +475,6 @@ struct device *gpio_dw_isr_0 = SYS_GET_DEVICE(gpio_0);
#else
#define GPIO_DW_0_IRQ_FLAGS 0
#endif
IRQ_CONNECT_STATIC(gpio_dw_0, CONFIG_GPIO_DW_0_IRQ,
CONFIG_GPIO_DW_0_PRI, gpio_dw_isr,
SYS_GET_DEVICE(gpio_0),
GPIO_DW_0_IRQ_FLAGS);
#endif
void gpio_config_0_irq(struct device *port)
@ -491,7 +484,8 @@ void gpio_config_0_irq(struct device *port)
#ifdef CONFIG_GPIO_DW_0_IRQ_DIRECT
ARG_UNUSED(shared_irq_dev);
IRQ_CONFIG(gpio_dw_0, config->irq_num);
irq_connect(CONFIG_GPIO_DW_0_IRQ, CONFIG_GPIO_DW_0_PRI, gpio_dw_isr,
SYS_GET_DEVICE(gpio_dw_0), GPIO_DW_0_IRQ_FLAGS);
irq_enable(config->irq_num);
#elif defined(CONFIG_GPIO_DW_0_IRQ_SHARED)
shared_irq_dev = device_get_binding(config->shared_irq_dev_name);
@ -534,15 +528,13 @@ struct gpio_dw_config gpio_dw_config_1 = {
struct gpio_dw_runtime gpio_1_runtime;
DECLARE_DEVICE_INIT_CONFIG(gpio_1, CONFIG_GPIO_DW_1_NAME,
DECLARE_DEVICE_INIT_CONFIG(gpio_dw_1, CONFIG_GPIO_DW_1_NAME,
gpio_dw_initialize, &gpio_dw_config_1);
SYS_DEFINE_DEVICE(gpio_1, &gpio_1_runtime, SECONDARY,
SYS_DEFINE_DEVICE(gpio_dw_1, &gpio_1_runtime, SECONDARY,
CONFIG_GPIO_DW_INIT_PRIORITY);
#ifdef CONFIG_GPIO_DW_1_IRQ_DIRECT
struct device *gpio_dw_isr_1 = SYS_GET_DEVICE(gpio_1);
#ifdef CONFIG_IOAPIC
#ifdef CONFIG_GPIO_DW_1
#if defined(CONFIG_GPIO_DW_1_FALLING_EDGE)
@ -558,11 +550,6 @@ struct device *gpio_dw_isr_1 = SYS_GET_DEVICE(gpio_1);
#else
#define GPIO_DW_1_IRQ_FLAGS 0
#endif
IRQ_CONNECT_STATIC(gpio_dw_1, CONFIG_GPIO_DW_1_IRQ,
CONFIG_GPIO_DW_1_PRI, gpio_dw_isr,
SYS_GET_DEVICE(gpio_1),
GPIO_DW_1_IRQ_FLAGS);
#endif
void gpio_config_1_irq(struct device *port)
@ -572,7 +559,8 @@ void gpio_config_1_irq(struct device *port)
#ifdef CONFIG_GPIO_DW_1_IRQ_DIRECT
ARG_UNUSED(shared_irq_dev);
IRQ_CONFIG(gpio_dw_1, config->irq_num);
irq_connect(CONFIG_GPIO_DW_1_IRQ, CONFIG_GPIO_DW_1_PRI, gpio_dw_isr,
SYS_GET_DEVICE(gpio_dw_1), GPIO_DW_1_IRQ_FLAGS);
irq_enable(config->irq_num);
#elif defined(CONFIG_GPIO_DW_1_IRQ_SHARED)
shared_irq_dev = device_get_binding(config->shared_irq_dev_name);

View file

@ -1,41 +0,0 @@
/*
* Copyright (c) 2015, Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file
* @brief GPIO interrupt stubs
* This module contains the static interrupt stubs for the gpio drivers
*/
#define _ASMLANGUAGE
#ifdef CONFIG_X86
#include <arch/x86/asm.h>
#include <drivers/ioapic.h>
#endif
#ifdef CONFIG_GPIO_DW_0
#ifdef CONFIG_IOAPIC
ioapic_mkstub gpio_dw_0 gpio_dw_isr gpio_dw_isr_0
#endif
#endif /* CONFIG_GPIO_DW_0 */
#ifdef CONFIG_GPIO_DW_1
#ifdef CONFIG_IOAPIC
ioapic_mkstub gpio_dw_1 gpio_dw_isr gpio_dw_isr_1
#endif
#endif /* CONFIG_GPIO_DW_1 */

View file

@ -1,2 +1,2 @@
obj-$(CONFIG_I2C_DW) += i2c_dw.o i2c_static_irq_stubs.o
obj-$(CONFIG_I2C_DW) += i2c_dw.o
obj-$(CONFIG_I2C_QUARK_SE_SS) += i2c_quark_se_ss.o

View file

@ -779,16 +779,6 @@ DECLARE_DEVICE_INIT_CONFIG(i2c_0,
&i2c_config_dw_0);
SYS_DEFINE_DEVICE(i2c_0, &i2c_0_runtime, SECONDARY, CONFIG_I2C_INIT_PRIORITY);
struct device *i2c_dw_isr_0_device = SYS_GET_DEVICE(i2c_0);
#ifdef CONFIG_I2C_DW_0_IRQ_DIRECT
IRQ_CONNECT_STATIC(i2c_dw_0,
CONFIG_I2C_DW_0_IRQ,
CONFIG_I2C_DW_0_INT_PRIORITY,
i2c_dw_isr,
SYS_GET_DEVICE(i2c_0),
I2C_DW_IRQ_FLAGS);
#endif
void i2c_config_0(struct device *port)
{
@ -797,7 +787,8 @@ void i2c_config_0(struct device *port)
#if defined(CONFIG_I2C_DW_0_IRQ_DIRECT)
ARG_UNUSED(shared_irq_dev);
IRQ_CONFIG(i2c_dw_0, config->irq_num);
irq_connect(CONFIG_I2C_DW_0_IRQ, CONFIG_I2C_DW_0_INT_PRIORITY,
i2c_dw_isr, SYS_GET_DEVICE(i2c_0), I2C_DW_IRQ_FLAGS);
irq_enable(config->irq_num);
#elif defined(CONFIG_I2C_DW_0_IRQ_SHARED)
ARG_UNUSED(config);
@ -842,14 +833,6 @@ DECLARE_DEVICE_INIT_CONFIG(i2c_1,
SYS_DEFINE_DEVICE(i2c_1, &i2c_1_runtime, SECONDARY,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
struct device *i2c_dw_isr_1_device = SYS_GET_DEVICE(i2c_1);
IRQ_CONNECT_STATIC(i2c_dw_1,
CONFIG_I2C_DW_1_IRQ,
CONFIG_I2C_DW_1_INT_PRIORITY,
i2c_dw_isr,
SYS_GET_DEVICE(i2c_1),
I2C_DW_IRQ_FLAGS);
void i2c_config_1(struct device *port)
{
@ -857,7 +840,8 @@ void i2c_config_1(struct device *port)
struct device *shared_irq_dev;
ARG_UNUSED(shared_irq_dev);
IRQ_CONFIG(i2c_dw_1, config->irq_num);
irq_connect(CONFIG_I2C_DW_1_IRQ, CONFIG_I2C_DW_1_INT_PRIORITY,
i2c_dw_isr, SYS_GET_DEVICE(i2c_1), I2C_DW_IRQ_FLAGS);
irq_enable(config->irq_num);
}

View file

@ -668,10 +668,10 @@ void _i2c_qse_ss_config_irq(struct device *port)
_i2c_qse_ss_memory_write(SCSS_REGISTER_BASE, rom->isr_stop_mask, mask);
/* Connect the IRQs to ISR */
irq_connect(rom->isr_err_vector, 1, i2c_qse_ss_isr, port, 0);
irq_connect(rom->isr_rx_vector, 1, i2c_qse_ss_isr, port, 0);
irq_connect(rom->isr_tx_vector, 1, i2c_qse_ss_isr, port, 0);
irq_connect(rom->isr_stop_vector, 1, i2c_qse_ss_isr, port, 0);
irq_connect_dynamic(rom->isr_err_vector, 1, i2c_qse_ss_isr, port, 0);
irq_connect_dynamic(rom->isr_rx_vector, 1, i2c_qse_ss_isr, port, 0);
irq_connect_dynamic(rom->isr_tx_vector, 1, i2c_qse_ss_isr, port, 0);
irq_connect_dynamic(rom->isr_stop_vector, 1, i2c_qse_ss_isr, port, 0);
irq_enable(rom->isr_err_vector);
irq_enable(rom->isr_rx_vector);

View file

@ -1,42 +0,0 @@
/*
* Copyright (c) 2015, Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file
* @brief I2C interrupt stubs
* This module contains the static interrupt stubs for the i2c drivers
*/
#define _ASMLANGUAGE
#ifdef CONFIG_X86
#include <arch/x86/asm.h>
#include <drivers/ioapic.h>
#endif
#if defined(CONFIG_I2C_DW_0)
#if defined(CONFIG_IOAPIC) || defined(CONFIG_MVIC)
ioapic_mkstub i2c_dw_0 i2c_dw_isr i2c_dw_isr_0_device
#endif
#endif /* CONFIG_I2C_DW_0 */
#if defined(CONFIG_I2C_DW_1)
#if defined(CONFIG_IOAPIC) || defined(CONFIG_MVIC)
ioapic_mkstub i2c_dw_1 i2c_dw_isr i2c_dw_isr_1_device
#endif
#endif /* CONFIG_I2C_DW_1 */

View file

@ -113,7 +113,7 @@ int _ioapic_init(struct device *unused)
/*
* Initialize the redirection table entries with default settings;
* actual interrupt vectors are specified during irq_connect().
* actual interrupt vectors are specified during irq_connect_dynamic().
*
* A future enhancement should make this initialization "table driven":
* use data provided by the platform to specify the initial state

View file

@ -302,7 +302,7 @@ void _loapic_disable(void)
* @brief Set the vector field in the specified RTE
*
* This routine is utilized by the interrupt controller's _SysIntVecAlloc()
* routine (which exists to support the irq_connect() API). Once
* routine (which exists to support the irq_connect_dynamic() API). Once
* a vector has been allocated, this routine is invoked to update the LVT
* entry associated with <irq> with the vector.
*

View file

@ -61,8 +61,8 @@ static int __LocalIntVecAlloc(unsigned int irq, unsigned int priority);
*
* @brief Allocate interrupt vector
*
* This routine is used by the x86's irq_connect(). It performs the following
* functions:
* This routine is used by the x86's irq_connect_dynamic(). It performs the
* following functions:
*
* a) Allocates a vector satisfying the requested priority. The utility
* routine _IntVecAlloc() provided by the nanokernel will be used to

View file

@ -1,4 +1,4 @@
ccflags-y += -I$(srctree/drivers)
obj-$(CONFIG_IPM_QUARK_SE) += ipm_quark_se.o ipm_static_irq_stubs.o
obj-$(CONFIG_IPM_QUARK_SE) += ipm_quark_se.o

View file

@ -1,28 +0,0 @@
/*
* Copyright (c) 2015, Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#define _ASMLANGUAGE
#ifdef CONFIG_X86
#include <arch/x86/asm.h>
#include <drivers/ioapic.h>
#endif
#if defined(CONFIG_IPM_QUARK_SE)
#if defined(CONFIG_IOAPIC)
ioapic_mkstub quark_se_ipm quark_se_ipm_isr 0
#endif
#endif

View file

@ -1,5 +1,4 @@
ccflags-$(CONFIG_RTC_QMSI) += -I$(CONFIG_QMSI_INSTALL_PATH)/include
obj-$(CONFIG_RTC) += rtc_static_irq_stubs.o
obj-$(CONFIG_RTC_DW) += rtc_dw.o
obj-$(CONFIG_RTC_QMSI) += rtc_qmsi.o

View file

@ -189,23 +189,7 @@ static struct rtc_driver_api funcs = {
.set_alarm = rtc_dw_set_alarm,
};
/* IRQ_CONFIG needs the flags variable declared by IRQ_CONNECT_STATIC */
IRQ_CONNECT_STATIC(rtc, CONFIG_RTC_IRQ,
CONFIG_RTC_IRQ_PRI, rtc_dw_isr, 0, 0);
int rtc_dw_init(struct device *dev)
{
IRQ_CONFIG(rtc, CONFIG_RTC_IRQ);
irq_enable(CONFIG_RTC_IRQ);
_rtc_dw_int_unmask();
_rtc_dw_clock_config(dev);
dev->driver_api = &funcs;
return DEV_OK;
}
int rtc_dw_init(struct device *dev);
struct rtc_dw_runtime rtc_runtime;
@ -222,4 +206,18 @@ DECLARE_DEVICE_INIT_CONFIG(rtc, CONFIG_RTC_DRV_NAME,
SYS_DEFINE_DEVICE(rtc, &rtc_runtime, SECONDARY,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
struct device *rtc_dw_isr_dev = SYS_GET_DEVICE(rtc);
int rtc_dw_init(struct device *dev)
{
irq_connect(CONFIG_RTC_IRQ, CONFIG_RTC_IRQ_PRI, rtc_dw_isr,
SYS_GET_DEVICE(rtc), 0);
irq_enable(CONFIG_RTC_IRQ);
_rtc_dw_int_unmask();
_rtc_dw_clock_config(dev);
dev->driver_api = &funcs;
return DEV_OK;
}

View file

@ -22,9 +22,6 @@
#include "qm_rtc.h"
IRQ_CONNECT_STATIC(rtc, CONFIG_RTC_IRQ, CONFIG_RTC_IRQ_PRI, qm_rtc_isr_0,
0, IOAPIC_EDGE | IOAPIC_HIGH);
static struct device *rtc_qmsi_dev;
static void (*user_callback)(struct device *dev);
@ -82,7 +79,8 @@ static struct rtc_driver_api api = {
static int rtc_qmsi_init(struct device *dev)
{
IRQ_CONFIG(rtc, CONFIG_RTC_IRQ);
irq_connect(CONFIG_RTC_IRQ, CONFIG_RTC_IRQ_PRI, qm_rtc_isr_0, 0,
IOAPIC_EDGE | IOAPIC_HIGH);
/* Unmask RTC interrupt */
irq_enable(CONFIG_RTC_IRQ);

View file

@ -1,38 +0,0 @@
/*
* Copyright (c) 2015, Intel Corportation.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#define _ASMLANGUAGE
#include <arch/x86/asm.h>
#include <drivers/ioapic.h>
#if defined(CONFIG_RTC_DW)
#if defined(CONFIG_IOAPIC) || defined(CONFIG_MVIC)
ioapic_mkstub rtc rtc_dw_isr rtc_dw_isr_dev
#endif
#endif
#if defined(CONFIG_RTC_QMSI)
#if defined(CONFIG_IOAPIC) || defined(CONFIG_MVIC)
ioapic_mkstub rtc qm_rtc_isr_0 0
#endif
#endif /* CONFIG_RTC_QMSI */
/* externs (internal APIs) */
GTEXT(_IntEnt)
GTEXT(_IntExit)

View file

@ -1,4 +1,3 @@
ccflags-y +=-I$(srctree)/drivers
obj-$(CONFIG_SHARED_IRQ) = shared_irq_static_irq_stubs.o
obj-$(CONFIG_SHARED_IRQ) += shared_irq.o

View file

@ -128,13 +128,13 @@ int shared_irq_initialize(struct device *dev)
struct shared_irq_config *config = dev->config->config_info;
dev->driver_api = &api_funcs;
config->config(dev);
config->config();
return 0;
}
#if CONFIG_SHARED_IRQ_0
void shared_irq_config_0_irq(struct device *port);
void shared_irq_config_0_irq(void);
struct shared_irq_config shared_irq_config_0 = {
.irq_num = CONFIG_SHARED_IRQ_0_IRQ,
@ -165,26 +165,17 @@ SYS_DEFINE_DEVICE(shared_irq_0, &shared_irq_0_runtime, SECONDARY,
#define SHARED_IRQ_0_FLAGS 0
#endif /* CONFIG_IOAPIC */
IRQ_CONNECT_STATIC(shared_irq_0, CONFIG_SHARED_IRQ_0_IRQ,
CONFIG_SHARED_IRQ_0_PRI, shared_irq_isr_0, 0,
void shared_irq_config_0_irq(void)
{
irq_connect(CONFIG_SHARED_IRQ_0_IRQ, CONFIG_SHARED_IRQ_0_PRI,
shared_irq_isr, SYS_GET_DEVICE(shared_irq_0),
SHARED_IRQ_0_FLAGS);
void shared_irq_config_0_irq(struct device *port)
{
struct shared_irq_config *config = port->config->config_info;
IRQ_CONFIG(shared_irq_0, config->irq_num);
}
void shared_irq_isr_0(void *unused)
{
shared_irq_isr(&__initconfig_shared_irq_0);
}
#endif /* CONFIG_SHARED_IRQ_0 */
#if CONFIG_SHARED_IRQ_1
void shared_irq_config_1_irq(struct device *port);
void shared_irq_config_1_irq(void);
struct shared_irq_config shared_irq_config_1 = {
.irq_num = CONFIG_SHARED_IRQ_1_IRQ,
@ -215,20 +206,11 @@ SYS_DEFINE_DEVICE(shared_irq_1, &shared_irq_1_runtime, SECONDARY,
#define SHARED_IRQ_1_FLAGS 0
#endif /* CONFIG_IOAPIC */
IRQ_CONNECT_STATIC(shared_irq_1, CONFIG_SHARED_IRQ_1_IRQ,
CONFIG_SHARED_IRQ_1_PRI, shared_irq_isr_1, 0,
void shared_irq_config_1_irq(void)
{
irq_connect(CONFIG_SHARED_IRQ_1_IRQ, CONFIG_SHARED_IRQ_1_PRI,
shared_irq_isr, SYS_GET_DEVICE(shared_irq_1),
SHARED_IRQ_1_FLAGS);
void shared_irq_config_1_irq(struct device *port)
{
struct shared_irq_config *config = port->config->config_info;
IRQ_CONFIG(shared_irq_1, config->irq_num);
}
void shared_irq_isr_1(void *unused)
{
shared_irq_isr(&__initconfig_shared_irq_1);
}
#endif /* CONFIG_SHARED_IRQ_1 */

View file

@ -1,29 +0,0 @@
/*
* Copyright (c) 2012-2015, Wind River Systems, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#define _ASMLANGUAGE
#include <arch/x86/asm.h>
#include <drivers/ioapic.h>
#if CONFIG_SHARED_IRQ_0
ioapic_mkstub shared_irq_0 shared_irq_isr_0 0
#endif /* CONFIG_SHARED_IRQ_0 */
#if CONFIG_SHARED_IRQ_1
ioapic_mkstub shared_irq_1 shared_irq_isr_1 0
#endif /* CONFIG_SHARED_IRQ_1 */

View file

@ -1,4 +1,2 @@
obj-$(CONFIG_SPI) = spi_static_irq_stubs.o
obj-$(CONFIG_SPI_INTEL) += intel_spi.o
obj-$(CONFIG_SPI_DW) += dw_spi.o

View file

@ -459,8 +459,13 @@ int spi_dw_init(struct device *dev)
#endif /* CONFIG_IOAPIC */
#ifdef CONFIG_SPI_DW_PORT_0
void spi_config_0_irq(struct device *dev);
void spi_config_0_irq(void)
{
irq_connect(CONFIG_SPI_DW_PORT_0_IRQ, CONFIG_SPI_DW_PORT_0_PRI,
spi_dw_isr, SYS_GET_DEVICE(spi_dw_port_0),
SPI_DW_IRQ_FLAGS);
irq_enable(CONFIG_SPI_DW_PORT_0_IRQ);
}
struct spi_dw_data spi_dw_data_port_0;
@ -479,24 +484,16 @@ DECLARE_DEVICE_INIT_CONFIG(spi_dw_port_0, CONFIG_SPI_DW_PORT_0_DRV_NAME,
SYS_DEFINE_DEVICE(spi_dw_port_0, &spi_dw_data_port_0, SECONDARY,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
struct device *spi_dw_isr_port_0 = SYS_GET_DEVICE(spi_dw_port_0);
IRQ_CONNECT_STATIC(spi_dw_irq_port_0, CONFIG_SPI_DW_PORT_0_IRQ,
CONFIG_SPI_DW_PORT_0_PRI, spi_dw_isr, 0,
SPI_DW_IRQ_FLAGS);
void spi_config_0_irq(struct device *dev)
{
struct spi_dw_config *config = dev->config->config_info;
IRQ_CONFIG(spi_dw_irq_port_0, config->irq);
irq_enable(config->irq);
}
#endif /* CONFIG_SPI_DW_PORT_0 */
#ifdef CONFIG_SPI_DW_PORT_1
void spi_config_1_irq(struct device *dev);
void spi_config_1_irq(void)
{
irq_connect(CONFIG_SPI_DW_PORT_1_IRQ, CONFIG_SPI_DW_PORT_1_PRI,
spi_dw_isr, SYS_GET_DEVICE(spi_dw_port_1),
SPI_DW_IRQ_FLAGS);
irq_enable(CONFIG_SPI_DW_PORT_1_IRQ);
}
struct spi_dw_data spi_dw_data_port_1;
@ -515,18 +512,4 @@ DECLARE_DEVICE_INIT_CONFIG(spi_dw_port_1, CONFIG_SPI_DW_PORT_1_DRV_NAME,
SYS_DEFINE_DEVICE(spi_dw_port_1, &spi_dw_data_port_1, SECONDARY,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
struct device *spi_dw_isr_port_1 = SYS_GET_DEVICE(spi_dw_port_1);
IRQ_CONNECT_STATIC(spi_dw_irq_port_1, CONFIG_SPI_DW_PORT_1_IRQ,
CONFIG_SPI_DW_PORT_1_PRI, spi_dw_isr, 0,
SPI_DW_IRQ_FLAGS);
void spi_config_1_irq(struct device *dev)
{
struct spi_dw_config *config = dev->config->config_info;
IRQ_CONFIG(spi_dw_irq_port_1, config->irq);
irq_enable(config->irq);
}
#endif /* CONFIG_SPI_DW_PORT_1 */

View file

@ -21,7 +21,7 @@
#include <spi.h>
typedef void (*spi_dw_config_t)(struct device *dev);
typedef void (*spi_dw_config_t)(void);
/* Private structures */
struct spi_dw_config {

View file

@ -420,7 +420,7 @@ int spi_intel_init(struct device *dev)
return DEV_NOT_CONFIG;
}
info->config_func(dev);
info->config_func();
_spi_config_cs(dev);
@ -448,7 +448,7 @@ int spi_intel_init(struct device *dev)
/* system bindings */
#ifdef CONFIG_SPI_INTEL_PORT_0
void spi_config_0_irq(struct device *dev);
void spi_config_0_irq(void);
struct spi_intel_data spi_intel_data_port_0;
@ -476,23 +476,18 @@ DECLARE_DEVICE_INIT_CONFIG(spi_intel_port_0, CONFIG_SPI_INTEL_PORT_0_DRV_NAME,
/* SPI may use GPIO pin for CS, thus it needs to be initialized after GPIO */
SYS_DEFINE_DEVICE(spi_intel_port_0, &spi_intel_data_port_0, SECONDARY,
CONFIG_SPI_INTEL_INIT_PRIORITY);
struct device *spi_intel_isr_port_0 = SYS_GET_DEVICE(spi_intel_port_0);
IRQ_CONNECT_STATIC(spi_intel_irq_port_0, CONFIG_SPI_INTEL_PORT_0_IRQ,
CONFIG_SPI_INTEL_PORT_0_PRI, spi_intel_isr, 0,
SPI_INTEL_IRQ_FLAGS);
void spi_config_0_irq(struct device *dev)
void spi_config_0_irq(void)
{
struct spi_intel_config *config = dev->config->config_info;
IRQ_CONFIG(spi_intel_irq_port_0, config->irq);
irq_connect(CONFIG_SPI_INTEL_PORT_0_IRQ, CONFIG_SPI_INTEL_PORT_0_PRI,
spi_intel_isr, SYS_GET_DEVICE(spi_intel_port_0),
SPI_INTEL_IRQ_FLAGS);
}
#endif /* CONFIG_SPI_INTEL_PORT_0 */
#ifdef CONFIG_SPI_INTEL_PORT_1
void spi_config_1_irq(struct device *dev);
void spi_config_1_irq(void);
struct spi_intel_data spi_intel_data_port_1;
@ -520,17 +515,12 @@ DECLARE_DEVICE_INIT_CONFIG(spi_intel_port_1, CONFIG_SPI_INTEL_PORT_1_DRV_NAME,
/* SPI may use GPIO pin for CS, thus it needs to be initialized after GPIO */
SYS_DEFINE_DEVICE(spi_intel_port_1, &spi_intel_data_port_1, SECONDARY,
CONFIG_SPI_INTEL_INIT_PRIORITY);
struct device *spi_intel_isr_port_1 = SYS_GET_DEVICE(spi_intel_port_1);
IRQ_CONNECT_STATIC(spi_intel_irq_port_1, CONFIG_SPI_INTEL_PORT_1_IRQ,
CONFIG_SPI_INTEL_PORT_1_PRI, spi_intel_isr, 0,
SPI_INTEL_IRQ_FLAGS);
void spi_config_1_irq(struct device *dev)
void spi_config_1_irq(void);
{
struct spi_intel_config *config = dev->config->config_info;
IRQ_CONFIG(spi_intel_irq_port_1, config->irq);
irq_connect(CONFIG_SPI_INTEL_PORT_1_IRQ, CONFIG_SPI_INTEL_PORT_1_PRI,
spi_intel_isr, SYS_GET_DEVICE(spi_intel_port_1),
SPI_INTEL_IRQ_FLAGS);
}
#endif /* CONFIG_SPI_INTEL_PORT_1 */

View file

@ -24,7 +24,7 @@
#include <pci/pci_mgr.h>
#endif /* CONFIG_PCI */
typedef void (*spi_intel_config_t)(struct device *dev);
typedef void (*spi_intel_config_t)(void);
struct spi_intel_config {
uint32_t regs;

View file

@ -1,40 +0,0 @@
/*
* Copyright (c) 2012-2015, Wind River Systems, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#define _ASMLANGUAGE
#ifdef CONFIG_X86
#include <arch/x86/asm.h>
#include <drivers/ioapic.h>
#endif
#if defined(CONFIG_SPI_INTEL_PORT_0)
ioapic_mkstub spi_intel_irq_port_0 spi_intel_isr spi_intel_isr_port_0
#endif /* CONFIG_SPI_INTEL_PORT_0 */
#if defined(CONFIG_SPI_INTEL_PORT_1)
ioapic_mkstub spi_intel_irq_port_1 spi_intel_isr spi_intel_isr_port_1
#endif /* CONFIG_SPI_INTEL_PORT_1 */
#if defined(CONFIG_SPI_DW_PORT_0)
#ifdef CONFIG_IOAPIC
ioapic_mkstub spi_dw_irq_port_0 spi_dw_isr spi_dw_isr_port_0
#endif
#endif
#if defined(CONFIG_SPI_DW_PORT_1)
#ifdef CONFIG_IOAPIC
ioapic_mkstub spi_dw_irq_port_1 spi_dw_isr spi_dw_isr_port_1
#endif
#endif

View file

@ -311,9 +311,6 @@ static void tickless_idle_init(void) {}
*/
int _sys_clock_driver_init(struct device *device)
{
int irq = CONFIG_ARCV2_TIMER0_INT_LVL;
int prio = CONFIG_ARCV2_TIMER0_INT_PRI;
ARG_UNUSED(device);
/* ensure that the timer will not generate interrupts */
@ -322,7 +319,8 @@ int _sys_clock_driver_init(struct device *device)
cycles_per_tick = sys_clock_hw_cycles_per_tick;
(void)irq_connect(irq, prio, _timer_int_handler, 0, 0);
irq_connect(CONFIG_ARCV2_TIMER0_INT_LVL, CONFIG_ARCV2_TIMER0_INT_PRI,
_timer_int_handler, 0, 0);
/*
* Set the reload value to achieve the configured tick rate, enable the

View file

@ -183,8 +183,6 @@ extern struct nano_stack _k_command_stack;
#define HPET_IOAPIC_FLAGS (IOAPIC_LEVEL | IOAPIC_LOW)
#endif
IRQ_CONNECT_STATIC(hpet, CONFIG_HPET_TIMER_IRQ, CONFIG_HPET_TIMER_IRQ_PRIORITY,
_timer_int_handler, 0, HPET_IOAPIC_FLAGS);
#ifdef CONFIG_INT_LATENCY_BENCHMARK
static uint32_t main_count_first_irq_value;
@ -614,8 +612,8 @@ int _sys_clock_driver_init(struct device *device)
* Although the stub has already been "connected", the vector number
* still has to be programmed into the interrupt controller.
*/
IRQ_CONFIG(hpet, CONFIG_HPET_TIMER_IRQ);
irq_connect(CONFIG_HPET_TIMER_IRQ, CONFIG_HPET_TIMER_IRQ_PRIORITY,
_timer_int_handler, 0, HPET_IOAPIC_FLAGS);
/* enable the IRQ in the interrupt controller */

View file

@ -128,10 +128,6 @@
extern int32_t _sys_idle_elapsed_ticks;
#endif /* TIMER_SUPPORTS_TICKLESS */
IRQ_CONNECT_STATIC(loapic, CONFIG_LOAPIC_TIMER_IRQ,
CONFIG_LOAPIC_TIMER_IRQ_PRIORITY,
_timer_int_handler, 0, 0);
/* computed counter 0 initial count value */
static uint32_t __noinit cycles_per_tick;
static uint32_t accumulated_cycle_count;
@ -571,11 +567,8 @@ int _sys_clock_driver_init(struct device *device)
initial_count_register_set(cycles_per_tick - 1);
periodic_mode_set();
/*
* Although the stub has already been "connected", the vector number
* still has to be programmed into the interrupt controller.
*/
IRQ_CONFIG(loapic, CONFIG_LOAPIC_TIMER_IRQ);
irq_connect(CONFIG_LOAPIC_TIMER_IRQ, CONFIG_LOAPIC_TIMER_IRQ_PRIORITY,
_timer_int_handler, 0, 0);
/* Everything has been configured. It is now safe to enable the
* interrupt

View file

@ -1,5 +1,3 @@
ccflags-$(CONFIG_WDT_QMSI) +=-I$(CONFIG_QMSI_INSTALL_PATH)/include
obj-$(CONFIG_WATCHDOG) += wdt_static_irq_stubs.o
obj-$(CONFIG_WDT_DW) += wdt_dw.o
obj-$(CONFIG_WDT_QMSI) += wdt_qmsi.o

View file

@ -149,23 +149,7 @@ static struct wdt_driver_api wdt_dw_funcs = {
.reload = wdt_dw_reload,
};
/* IRQ_CONFIG needs the flags variable declared by IRQ_CONNECT_STATIC */
IRQ_CONNECT_STATIC(wdt_dw, CONFIG_WDT_DW_IRQ,
CONFIG_WDT_DW_IRQ_PRI, wdt_dw_isr, 0, 0);
int wdt_dw_init(struct device *dev)
{
dev->driver_api = &wdt_dw_funcs;
IRQ_CONFIG(wdt_dw, CONFIG_WDT_DW_IRQ);
irq_enable(CONFIG_WDT_DW_IRQ);
_wdt_dw_int_unmask();
_wdt_dw_clock_config(dev);
return 0;
}
int wdt_dw_init(struct device *dev);
struct wdt_dw_runtime wdt_runtime;
@ -182,4 +166,18 @@ DECLARE_DEVICE_INIT_CONFIG(wdt, CONFIG_WDT_DW_DRV_NAME,
SYS_DEFINE_DEVICE(wdt, &wdt_runtime, SECONDARY,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
struct device *wdt_dw_isr_dev = SYS_GET_DEVICE(wdt);
int wdt_dw_init(struct device *dev)
{
dev->driver_api = &wdt_dw_funcs;
irq_connect(CONFIG_WDT_DW_IRQ, CONFIG_WDT_DW_IRQ_PRI, wdt_dw_isr,
SYS_GET_DEVICE(wdt), 0);
irq_enable(CONFIG_WDT_DW_IRQ);
_wdt_dw_int_unmask();
_wdt_dw_clock_config(dev);
return 0;
}

View file

@ -83,12 +83,10 @@ void wdt_qmsi_isr(void *arg)
qm_wdt_isr_0();
}
IRQ_CONNECT_STATIC(wdt, CONFIG_WDT_QMSI_IRQ, CONFIG_WDT_QMSI_IRQ_PRI,
wdt_qmsi_isr, 0, IOAPIC_EDGE | IOAPIC_HIGH);
static int init(struct device *dev)
{
IRQ_CONFIG(wdt, CONFIG_WDT_QMSI_IRQ);
irq_connect(CONFIG_WDT_QMSI_IRQ, CONFIG_WDT_QMSI_IRQ_PRI,
wdt_qmsi_isr, 0, IOAPIC_EDGE | IOAPIC_HIGH);
/* Unmask watchdog interrupt */
irq_enable(CONFIG_WDT_QMSI_IRQ);

View file

@ -1,38 +0,0 @@
/*
* Copyright (c) 2015, Intel Corportation.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#define _ASMLANGUAGE
#include <arch/x86/asm.h>
#include <drivers/ioapic.h>
#if defined(CONFIG_WDT_DW)
#if defined(CONFIG_IOAPIC) || defined(CONFIG_MVIC)
ioapic_mkstub wdt_dw wdt_dw_isr wdt_dw_isr_dev
#endif /* CONFIG_IOAPIC */
#endif
#if defined(CONFIG_WDT_QMSI)
#if defined(CONFIG_IOAPIC) || defined(CONFIG_MVIC)
ioapic_mkstub wdt wdt_qmsi_isr wdt_qmsi_isr_dev
#endif /* CONFIG_IOAPIC || CONFIG_MVIC */
#endif /* CONFIG_WDT_QMSI */
/* externs (internal APIs) */
GTEXT(_IntEnt)
GTEXT(_IntExit)

View file

@ -56,50 +56,48 @@ extern "C" {
#ifndef _ASMLANGUAGE
/**
* @brief Connect a routine to interrupt number
*
* For the device @a device associates IRQ number @a irq with priority
* @a priority with the interrupt routine @a isr, that receives parameter
* @a parameter.
* IRQ connect static is currently not supported in ARC architecture.
* The macro is defined as empty for code compatibility with other
* architectures.
*
* @param device Device
* @param i IRQ number
* @param p IRQ Priority
* @param h Interrupt Service Routine
* @param pm ISR parameter
* @param f IRQ triggering options
*
* @return N/A
*
*/
#define IRQ_CONNECT_STATIC(device, i, p, h, pm, f) \
const unsigned int _##device##_int_priority = (p); \
struct _IsrTableEntry _CONCAT(_isr_irq, i) \
__attribute__ ((section(STRINGIFY(_CONCAT(.gnu.linkonce.isr_irq, i))))) = \
{pm, h}
/* internal routine documented in C file, needed by IRQ_CONFIG macro */
/* internal routine documented in C file, needed by irq_connect() macro */
extern void _irq_priority_set(unsigned int irq, unsigned int prio);
/**
* Configure a static interrupt.
*
* @brief Configure interrupt for the device
* All arguments must be computable by the compiler at build time; if this
* can't be done use irq_connect_dynamic() instead.
*
* For the selected device, do the neccessary configuration
* steps to connect and enable the IRQ line with an ISR
* at the priority requested.
* @param device - Device name
* @param i IRQ number
* Internally this function does a few things:
*
* @return N/A
* 1. The enum statement has no effect but forces the compiler to only
* accept constant values for the irq_p parameter, very important as the
* numerical IRQ line is used to create a named section.
*
* 2. An instance of _IsrTableEntry is created containing the ISR and its
* parameter. If you look at how _sw_isr_table is created, each entry in the
* array is in its own section named by the IRQ line number. What we are doing
* here is to override one of the default entries (which points to the
* spurious IRQ handler) with what was supplied here.
*
* 3. The priority level for the interrupt is configured by a call to
* _irq_priority_set()
*
* @param irq_p IRQ line number
* @param priority_p Interrupt priority
* @param isr_p Interrupt service routine
* @param isr_param_p ISR parameter
* @param flags_p IRQ triggering options (currently unused)
*
* @return The vector assigned to this interrupt
*/
#define IRQ_CONFIG(device, i) \
_irq_priority_set(i, _##device##_int_priority)
#define irq_connect(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
({ \
enum { IRQ = irq_p }; \
static struct _IsrTableEntry _CONCAT(_isr_irq, irq_p) \
__attribute__ ((used)) \
__attribute__ ((section(STRINGIFY(_CONCAT(.gnu.linkonce.isr_irq, irq_p))))) = \
{isr_param_p, isr_p}; \
_irq_priority_set(irq_p, priority_p); \
irq_p; \
})
#endif

View file

@ -33,7 +33,7 @@ GTEXT(irq_connect)
GTEXT(irq_enable)
GTEXT(irq_disable)
#else
extern int irq_connect(unsigned int irq,
extern int irq_connect_dynamic(unsigned int irq,
unsigned int prio,
void (*isr)(void *arg),
void *arg,

View file

@ -29,11 +29,11 @@
#ifdef _ASMLANGUAGE
GTEXT(_IntExit);
GTEXT(irq_connect)
GTEXT(irq_connect_dynamic)
GTEXT(irq_enable)
GTEXT(irq_disable)
#else
extern int irq_connect(unsigned int irq,
extern int irq_connect_dynamic(unsigned int irq,
unsigned int prio,
void (*isr)(void *arg),
void *arg,
@ -52,40 +52,49 @@ extern void _IntExit(void);
#define DO_CONCAT(x, y) x ## y
#define CONCAT(x, y) DO_CONCAT(x, y)
/**
*
* @brief Connect a routine to interrupt number
*
* For the device @a device associates IRQ number @a irq with priority
* @a priority with the interrupt routine @a isr, that receives parameter
* @a parameter
*
* @return N/A
*
*/
#define IRQ_CONNECT_STATIC(device, irq, priority, isr, parameter, flags) \
const unsigned int _##device##_int_priority = (priority); \
struct _IsrTableEntry CONCAT(_isr_irq, irq) \
__attribute__ ((section(TOSTR(CONCAT(.gnu.linkonce.isr_irq, irq))))) = \
{parameter, isr}
/* internal routine documented in C file, needed by IRQ_CONFIG macro */
/* internal routine documented in C file, needed by irq_connect() macro */
extern void _irq_priority_set(unsigned int irq, unsigned int prio);
/**
* Configure a static interrupt.
*
* @brief Configure interrupt for the device
* All arguments must be computable by the compiler at build time; if this
* can't be done use irq_connect_dynamic() instead.
*
* For the given device do the necessary configuration steps.
* For ARM platform, set the interrupt priority
* Internally this function does a few things:
*
* @param device Device to configure
* @param irq IRQ number
* @return N/A
* 1. The enum statement has no effect but forces the compiler to only
* accept constant values for the irq_p parameter, very important as the
* numerical IRQ line is used to create a named section.
*
* 2. An instance of _IsrTableEntry is created containing the ISR and its
* parameter. If you look at how _sw_isr_table is created, each entry in the
* array is in its own section named by the IRQ line number. What we are doing
* here is to override one of the default entries (which points to the
* spurious IRQ handler) with what was supplied here.
*
* 3. The priority level for the interrupt is configured by a call to
* _irq_priority_set()
*
* @param irq_p IRQ line number
* @param priority_p Interrupt priority
* @param isr_p Interrupt service routine
* @param isr_param_p ISR parameter
* @param flags_p IRQ triggering options (currently unused)
*
* @return The vector assigned to this interrupt
*/
#define IRQ_CONFIG(device, irq) \
_irq_priority_set(irq, _##device##_int_priority)
#define irq_connect(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
({ \
enum { IRQ = irq_p }; \
static struct _IsrTableEntry _CONCAT(_isr_irq, irq_p) \
__attribute__ ((used)) \
__attribute__ ((section(STRINGIFY(_CONCAT(.gnu.linkonce.isr_irq, irq_p))))) = \
{isr_param_p, isr_p}; \
_irq_priority_set(irq_p, priority_p); \
irq_p; \
})
#endif /* _ASMLANGUAGE */

View file

@ -151,35 +151,124 @@ typedef struct s_isrList {
ISR_LIST __attribute__((section(".intList"))) MK_ISR_NAME(r) = \
{&r, n, p, v, d}
/**
* @brief Connect a routine to interrupt number
* Inline assembly code for the interrupt stub
*
* For the device @a device associates IRQ number @a irq with priority
* @a priority with the interrupt routine @a isr, that receives parameter
* @a parameter.
* This is the actual assembly code which gets run when the interrupt
* is triggered. Due to different calling convention semantics we have
* different versions for IAMCU and SYSV.
*
* @param device Device
* @param irq IRQ number
* @param priority IRQ Priority
* @param isr Interrupt Service Routine
* @param parameter ISR parameter
* @param flags IRQ triggering options
* For IAMCU case, we call _execute_handler() with the isr and its argument
* as parameters.
*
* @return N/A
* For SysV case, we first call _IntEnt to properly enter Zephyr's interrupt
* handling context, and then directly call the isr. A jump is done to
* _IntExitWithEoi which does EOI to the interrupt controller, restores
* context, and finally does 'iret'.
*
* This is only intended to be used by the irq_connect() macro.
*/
#ifdef CONFIG_MVIC
#define IRQ_CONNECT_STATIC(device, irq, priority, isr, parameter, flags) \
extern void *_##device##_##isr##_stub; \
const uint32_t _##device##_irq_flags = (flags); \
NANO_CPU_INT_REGISTER(_##device##_##isr##_stub, (irq), \
((irq) + 0x20) / 16, (irq) + 0x20, 0)
#if CONFIG_X86_IAMCU
#define _IRQ_STUB_ASM \
"pushl %%eax\n\t" \
"pushl %%edx\n\t" \
"pushl %%ecx\n\t" \
"movl %[isr], %%eax\n\t" \
"movl %[isr_param], %%edx\n\t" \
"call _execute_handler\n\t" \
"popl %%ecx\n\t" \
"popl %%edx\n\t" \
"popl %%eax\n\t" \
"iret\n\t"
#else
#define IRQ_CONNECT_STATIC(device, irq, priority, isr, parameter, flags) \
extern void *_##device##_##isr##_stub; \
const uint32_t _##device##_irq_flags = (flags); \
NANO_CPU_INT_REGISTER(_##device##_##isr##_stub, (irq), (priority), -1, 0)
#endif
#define _IRQ_STUB_ASM \
"call _IntEnt\n\t" \
"pushl %[isr_param]\n\t" \
"call %P[isr]\n\t" \
"jmp _IntExitWithEoi\n\t"
#endif /* CONFIG_X86_IAMCU */
/**
* Code snippets for populating the vector ID and priority into the intList
*
* The 'magic' of static interrupts is accomplished by building up an array
* 'intList' at compile time, and the gen_idt tool uses this to create the
* actual IDT data structure.
*
* For controllers like APIC, the vectors in the IDT are not normally assigned
* at build time; instead the sentinel value -1 is saved, and gen_idt figures
* out the right vector to use based on our priority scheme. Groups of 16
* vectors starting at 32 correspond to each priority level.
*
* On MVIC, the mapping is fixed; the vector to use is just the irq line
* number plus 0x20. The priority argument supplied by the user is discarded.
*
* These macros are only intended to be used by irq_connect() macro.
*/
#if CONFIG_MVIC
#define _PRIORITY_ARG(irq_p, priority_p) ((irq_p + 0x20) / 16)
#define _VECTOR_ARG(irq_p) (irq_p + 0x20)
#else
#define _PRIORITY_ARG(irq_p, priority_p) (priority_p)
#define _VECTOR_ARG(irq_p) (-1)
#endif /* CONFIG_MVIC */
/**
* Configure a static interrupt.
*
* All arguments must be computable by the compiler at build time; if this
* can't be done use irq_connect_dynamic() instead.
*
* Internally this function does a few things:
*
* 1. There is a block of inline assembly which is completely skipped over
* at runtime with an initial 'jmp' instruction.
*
* 2. There is a declaration of the interrupt parameters in the .intList
* section, used by gen_idt to create the IDT. This does the same thing
* as the NANO_CPU_INT_REGISTER() macro, but is done in assembly as we
* need to populate the .fnc member with the address of the assembly
* IRQ stub that we generate immediately afterwards.
*
* 3. The IRQ stub itself is declared. It doesn't get run in the context
* of the calling function due to the initial 'jmp' instruction at the
* beginning of the assembly block, but a pointer to it gets saved in the IDT.
*
* 4. _SysIntVecProgram() is called at runtime to set the mapping between
* the vector and the IRQ line.
*
* @param irq_p IRQ line number
* @param priority_p Interrupt priority
* @param isr_p Interrupt service routine
* @param isr_param_p ISR parameter
* @param flags_p IRQ triggering options
*
* @return The vector assigned to this interrupt
*/
#define irq_connect(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
({ \
__asm__ __volatile__( \
"jmp 2f\n\t" \
".pushsection .intList\n\t" \
".long 1f\n\t" /* ISR_LIST.fnc */ \
".long %P[irq]\n\t" /* ISR_LIST.irq */ \
".long %P[priority]\n\t" /* ISR_LIST.priority */ \
".long %P[vector]\n\t" /* ISR_LIST.vec */ \
".long 0\n\t" /* ISR_LIST.dpl */ \
".popsection\n\t" \
"1:\n\t" \
_IRQ_STUB_ASM \
"2:\n\t" \
: \
: [isr] "i" (isr_p), \
[isr_param] "i" (isr_param_p), \
[priority] "i" _PRIORITY_ARG(irq_p, priority_p), \
[vector] "i" _VECTOR_ARG(irq_p), \
[irq] "i" (irq_p)); \
_SysIntVecProgram(_IRQ_TO_INTERRUPT_VECTOR(irq_p), (irq_p), (flags_p)); \
_IRQ_TO_INTERRUPT_VECTOR(irq_p); \
})
extern unsigned char _irq_to_interrupt_vector[];
/**
@ -190,24 +279,6 @@ extern unsigned char _irq_to_interrupt_vector[];
#define _IRQ_TO_INTERRUPT_VECTOR(irq) \
((unsigned int) _irq_to_interrupt_vector[irq])
/**
*
* @brief Configure interrupt for the device
*
* For the given device do the necessary configuration steps.
* For x86 platform configure APIC and mark interrupt vector allocated
* @param device Device - not used by macro
* @param irq IRQ
*
* @return N/A
*
*/
#define IRQ_CONFIG(device, irq) \
do { \
_SysIntVecProgram(_IRQ_TO_INTERRUPT_VECTOR((irq)), (irq), \
_##device##_irq_flags); \
} while (0)
/**
* @brief Nanokernel Exception Stack Frame
@ -378,7 +449,7 @@ typedef void (*NANO_EOI_GET_FUNC) (void *);
#endif /* CONFIG_SSE */
#endif /* CONFIG_FP_SHARING */
extern int irq_connect(unsigned int irq,
extern int irq_connect_dynamic(unsigned int irq,
unsigned int priority,
void (*routine)(void *parameter),
void *parameter,

View file

@ -46,9 +46,7 @@ extern "C" {
#define IOAPIC_INIT 0x00000500
#define IOAPIC_EXTINT 0x00000700
#ifdef _ASMLANGUAGE
#define ioapic_mkstub loapic_mkstub
#else /* _ASMLANGUAGE */
#ifndef _ASMLANGUAGE
#include <device.h>
void _ioapic_irq_enable(unsigned int irq);
void _ioapic_irq_disable(unsigned int irq);

View file

@ -54,40 +54,7 @@ extern "C" {
/* Local APIC Vector Table Bits */
#define LOAPIC_LVT_MASKED 0x00010000 /* mask */
#ifdef _ASMLANGUAGE
loapic_eoi = (CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_EOI)
#if !defined(CONFIG_X86_IAMCU)
.macro loapic_mkstub device isr context
GTEXT(_\()\device\()_\()\isr\()_stub)
SECTION_FUNC(TEXT, _\()\device\()_\()\isr\()_stub)
call _IntEnt /* Inform kernel interrupt has begun */
pushl \context /* Push context parameter */
call \isr /* Call actual interrupt handler */
jmp _IntExitWithEoi /* Inform kernel interrupt is done */
.endm
#else
.macro loapic_mkstub device isr context
GTEXT(_\()\device\()_\()\isr\()_stub)
SECTION_FUNC(TEXT, _\()\device\()_\()\isr\()_stub)
pushl %eax
pushl %edx
pushl %ecx
movl $\isr, %eax
movl \context, %edx
call _execute_handler
pop %ecx
pop %edx
pop %eax
iret
.endm
#endif /* CONFIG_X86_IAMCU */
#else /* _ASMLANGUAGE */
#ifndef _ASMLANGUAGE
#include <device.h>
extern void _loapic_int_vec_set(unsigned int irq, unsigned int vector);

View file

@ -38,7 +38,7 @@ struct shared_irq_driver_api {
extern int shared_irq_initialize(struct device *port);
typedef void (*shared_irq_config_irq_t)(struct device *port);
typedef void (*shared_irq_config_irq_t)(void);
struct shared_irq_config {
uint32_t irq_num;

View file

@ -214,11 +214,7 @@ uint32_t task_irq_alloc(kirq_t irq_obj, uint32_t irq, uint32_t priority,
return INVALID_VECTOR;
}
/*
* NOTE: the comma that seems to be missing is part of the IRQ_STUB
* definition to abstract the different irq_connect signatures
*/
irq_obj_ptr->vector = irq_connect(
irq_obj_ptr->vector = irq_connect_dynamic(
irq, priority, task_irq_int_handler, (void *)irq_obj_ptr,
flags);
irq_enable(irq);

View file

@ -158,7 +158,7 @@ void fgTaskEntry(void)
{
#ifdef TEST_max
/* dynamically link in dummy ISR */
irq_connect(NANO_SOFT_IRQ, IRQ_PRIORITY, dummyIsr, (void *) 0, 0);
irq_connect_dynamic(NANO_SOFT_IRQ, IRQ_PRIORITY, dummyIsr, (void *) 0, 0);
#endif /* TEST_max */
/* note: referencing "func_array" ensures it isn't optimized out */

View file

@ -159,7 +159,7 @@ void main(void)
{
#ifdef TEST_max
/* dynamically link in dummy ISR */
irq_connect(NANO_SOFT_IRQ, IRQ_PRIORITY, dummyIsr,
irq_connect_dynamic(NANO_SOFT_IRQ, IRQ_PRIORITY, dummyIsr,
(void *) 0, 0);
#endif /* TEST_max */
#ifndef TEST_min

View file

@ -147,7 +147,7 @@ void main(void)
#ifdef CONFIG_DYNAMIC_ISR
/* dynamically link in dummy ISR */
irq_connect(NANO_SOFT_IRQ, IRQ_PRIORITY, dummyIsr,
irq_connect_dynamic(NANO_SOFT_IRQ, IRQ_PRIORITY, dummyIsr,
(void *) 0, 0);
#endif

View file

@ -37,9 +37,8 @@ irq_unlock
- Continuation irq_lock: unlock interrupts, loop and verify the tick
count changes.
irq_connect
- Used during nanokernel object initialization. Verified when triggering
an ISR to perform ISR context work.
irq_offload
- Used when triggering an ISR to perform ISR context work.
nanoCpuExcConnect
- Used during nanokernel object initialization. Verified by triggering a

View file

@ -22,7 +22,7 @@ This module tests the following CPU and thread related routines:
fiber_fiber_start(), task_fiber_start(), fiber_yield(),
sys_thread_self_get(), sys_execution_context_type_get(), nano_cpu_idle(),
irq_lock(), irq_unlock(),
irq_connect(), nanoCpuExcConnect(),
irq_offload(), nanoCpuExcConnect(),
irq_enable(), irq_disable(),
*/