diff --git a/arch/arm/soc/nxp_imx/mcimx7_m4/Kconfig.defconfig.mcimx7_m4 b/arch/arm/soc/nxp_imx/mcimx7_m4/Kconfig.defconfig.mcimx7_m4
index 5e30bcde2d8..3e280ffaf63 100644
--- a/arch/arm/soc/nxp_imx/mcimx7_m4/Kconfig.defconfig.mcimx7_m4
+++ b/arch/arm/soc/nxp_imx/mcimx7_m4/Kconfig.defconfig.mcimx7_m4
@@ -50,6 +50,13 @@ config I2C_IMX
 
 endif # I2C
 
+if PWM
+
+config PWM_IMX
+	def_bool y
+
+endif # PWM
+
 config DOMAIN_ID
 	int
 	default 1
diff --git a/arch/arm/soc/nxp_imx/mcimx7_m4/soc.c b/arch/arm/soc/nxp_imx/mcimx7_m4/soc.c
index 71cc30e707f..b941fab8fad 100644
--- a/arch/arm/soc/nxp_imx/mcimx7_m4/soc.c
+++ b/arch/arm/soc/nxp_imx/mcimx7_m4/soc.c
@@ -155,6 +155,61 @@ static void nxp_mcimx7_i2c_config(void)
 }
 #endif /* CONFIG_I2C_IMX */
 
+#ifdef CONFIG_PWM_IMX
+static void nxp_mcimx7_pwm_config(void)
+{
+
+#ifdef CONFIG_PWM_1
+	/* We need to grasp board pwm exclusively */
+	RDC_SetPdapAccess(RDC, rdcPdapPwm1,
+			RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
+			false, false);
+	/* Select clock derived from OSC clock(24M) */
+	CCM_UpdateRoot(CCM, ccmRootPwm1, ccmRootmuxPwmOsc24m, 0, 0);
+	/* Enable pwm clock */
+	CCM_EnableRoot(CCM, ccmRootPwm1);
+	CCM_ControlGate(CCM, ccmCcgrGatePwm1, ccmClockNeededAll);
+#endif /* #ifdef CONFIG_PWM_1 */
+
+#ifdef CONFIG_PWM_2
+	/* We need to grasp board pwm exclusively */
+	RDC_SetPdapAccess(RDC, rdcPdapPwm2,
+			RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
+			false, false);
+	/* Select clock derived from OSC clock(24M) */
+	CCM_UpdateRoot(CCM, ccmRootPwm2, ccmRootmuxPwmOsc24m, 0, 0);
+	/* Enable pwm clock */
+	CCM_EnableRoot(CCM, ccmRootPwm2);
+	CCM_ControlGate(CCM, ccmCcgrGatePwm2, ccmClockNeededAll);
+#endif /* #ifdef CONFIG_PWM_2 */
+
+#ifdef CONFIG_PWM_3
+	/* We need to grasp board pwm exclusively */
+	RDC_SetPdapAccess(RDC, rdcPdapPwm3,
+			RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
+			false, false);
+	/* Select clock derived from OSC clock(24M) */
+	CCM_UpdateRoot(CCM, ccmRootPwm3, ccmRootmuxPwmOsc24m, 0, 0);
+	/* Enable pwm clock */
+	CCM_EnableRoot(CCM, ccmRootPwm3);
+	CCM_ControlGate(CCM, ccmCcgrGatePwm3, ccmClockNeededAll);
+#endif /* #ifdef CONFIG_PWM_3 */
+
+#ifdef CONFIG_PWM_4
+	/* We need to grasp board pwm exclusively */
+	RDC_SetPdapAccess(RDC, rdcPdapPwm4,
+			RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
+			false, false);
+	/* Select clock derived from OSC clock(24M) */
+	CCM_UpdateRoot(CCM, ccmRootPwm4, ccmRootmuxPwmOsc24m, 0, 0);
+	/* Enable pwm clock */
+	CCM_EnableRoot(CCM, ccmRootPwm4);
+	CCM_ControlGate(CCM, ccmCcgrGatePwm4, ccmClockNeededAll);
+#endif /* #ifdef CONFIG_PWM_4 */
+
+}
+#endif /* CONFIG_PWM_IMX */
+
 static int nxp_mcimx7_init(struct device *arg)
 {
 	ARG_UNUSED(arg);
@@ -177,6 +232,10 @@ static int nxp_mcimx7_init(struct device *arg)
 	nxp_mcimx7_i2c_config();
 #endif /* CONFIG_I2C_IMX */
 
+#ifdef CONFIG_PWM_IMX
+	nxp_mcimx7_pwm_config();
+#endif /* CONFIG_PWM_IMX */
+
 	return 0;
 }
 
diff --git a/dts/arm/nxp/nxp_imx7d_m4.dtsi b/dts/arm/nxp/nxp_imx7d_m4.dtsi
index 2b677d50ad3..8c98c5a39c4 100644
--- a/dts/arm/nxp/nxp_imx7d_m4.dtsi
+++ b/dts/arm/nxp/nxp_imx7d_m4.dtsi
@@ -246,6 +246,42 @@
 			label = "I2C_4";
 			status = "disabled";
 		};
+
+		pwm1: pwm@30660000 {
+			compatible = "fsl,imx7d-pwm";
+			reg = <0x30660000 0x10000>;
+			interrupts = <81 0>;
+			prescaler = <0>;
+			label = "PWM_1";
+			status = "disabled";
+		};
+
+		pwm2: pwm@30670000 {
+			compatible = "fsl,imx7d-pwm";
+			reg = <0x30670000 0x10000>;
+			interrupts = <82 0>;
+			prescaler = <0>;
+			label = "PWM_2";
+			status = "disabled";
+		};
+
+		pwm3: pwm@30680000 {
+			compatible = "fsl,imx7d-pwm";
+			reg = <0x30680000 0x10000>;
+			interrupts = <83 0>;
+			prescaler = <0>;
+			label = "PWM_3";
+			status = "disabled";
+		};
+
+		pwm4: pwm@30690000 {
+			compatible = "fsl,imx7d-pwm";
+			reg = <0x30690000 0x10000>;
+			interrupts = <84 0>;
+			prescaler = <0>;
+			label = "PWM_4";
+			status = "disabled";
+		};
 	};
 };
 
diff --git a/dts/bindings/pwm/fsl,imx7d-pwm.yaml b/dts/bindings/pwm/fsl,imx7d-pwm.yaml
new file mode 100644
index 00000000000..8ac71406ef8
--- /dev/null
+++ b/dts/bindings/pwm/fsl,imx7d-pwm.yaml
@@ -0,0 +1,42 @@
+#
+# Copyright (c) 2018, Diego Sueiro <diego.sueiro@gmail.com>
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+---
+title: i.MX7D PWM
+id: fsl,imx7d-pwm
+version: 0.1
+
+description: >
+    This binding gives a base representation of the i.MX7D PWM
+
+inherits:
+    !include pwm.yaml
+
+properties:
+    compatible:
+      type: string
+      category: required
+      description: compatible strings
+      constraint: "fsl,imx7d-pwm"
+
+    reg:
+      type: array
+      description: mmio register space
+      generation: define
+      category: required
+
+    interrupts:
+      type: array
+      category: required
+      description: required interrupts
+      generation: define
+
+    prescaler:
+     type: int
+     category: required
+     description: Set the PWM prescale between 0 and 4096
+     generation: define
+
+...