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soc: arm: replace redundant config option for caches for nxp_imx

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Replace the redundant cache config options for the nxp_imx and
use sys_cache* functions to enable the caches. These will automatically
consider CONFIG_CACHE_MANAGEMENT.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
This commit is contained in:
Benedikt Schmidt 2023-12-18 10:41:25 +01:00 • committed by Carles Cufí
commit d992683db5
3 changed files with 6 additions and 46 deletions
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12
soc/arm/nxp_imx/rt/Kconfig.soc
View file

@ -834,16 +834,4 @@ config SECOND_CORE_MCUX
generated header specifying the VMA and LMA of each memory section
to load
config IMXRT1XXX_CODE_CACHE
bool "Code cache"
default y
help
Enable Code cache at boot for IMXRT1xxx series
config IMXRT1XXX_DATA_CACHE
bool "Data cache"
default y
help
Enable Data cache at boot for IMXRT1xxx series
endif # SOC_SERIES_IMX_RT

20
soc/arm/nxp_imx/rt/soc_rt10xx.c
View file

@ -10,6 +10,7 @@
#include <soc.h>
#include <zephyr/linker/sections.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/cache.h>
#include <fsl_clock.h>
#ifdef CONFIG_NXP_IMX_RT_BOOT_HEADER
#include <fsl_flexspi_nor_boot.h>
@ -318,23 +319,8 @@ void imxrt_audio_codec_pll_init(uint32_t clock_name, uint32_t clk_src,
static int imxrt_init(void)
{
#ifndef CONFIG_IMXRT1XXX_CODE_CACHE
/* SystemInit enables code cache, disable it here */
SCB_DisableICache();
#else
/* z_arm_init_arch_hw_at_boot() disables code cache if CONFIG_ARCH_CACHE is enabled,
* enable it here.
*/
SCB_EnableICache();
#endif
if (IS_ENABLED(CONFIG_IMXRT1XXX_DATA_CACHE)) {
if ((SCB->CCR & SCB_CCR_DC_Msk) == 0) {
SCB_EnableDCache();
}
} else {
SCB_DisableDCache();
}
sys_cache_instr_enable();
sys_cache_data_enable();
/* Initialize system clock */
clock_init();

20
soc/arm/nxp_imx/rt/soc_rt11xx.c
View file

@ -10,6 +10,7 @@
#include <soc.h>
#include <zephyr/linker/sections.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/cache.h>
#include <fsl_clock.h>
#include <fsl_gpc.h>
#include <fsl_pmu.h>
@ -673,23 +674,8 @@ static int imxrt_init(void)
#if defined(CONFIG_SOC_MIMXRT1176_CM7) || defined(CONFIG_SOC_MIMXRT1166_CM7)
#ifndef CONFIG_IMXRT1XXX_CODE_CACHE
/* SystemInit enables code cache, disable it here */
SCB_DisableICache();
#else
/* z_arm_init_arch_hw_at_boot() disables code cache if CONFIG_ARCH_CACHE is enabled,
* enable it here.
*/
SCB_EnableICache();
#endif
if (IS_ENABLED(CONFIG_IMXRT1XXX_DATA_CACHE)) {
if ((SCB->CCR & SCB_CCR_DC_Msk) == 0) {
SCB_EnableDCache();
}
} else {
SCB_DisableDCache();
}
sys_cache_instr_enable();
sys_cache_data_enable();
#endif
/* Initialize system clock */