From d8e00270828f1d8f5d0c2c91826db6cc35ab0ba3 Mon Sep 17 00:00:00 2001 From: Henrik Brix Andersen Date: Sun, 22 Aug 2021 15:41:43 +0200 Subject: [PATCH] soc: riscv: privilege: define __soc_handle_irq as weak symbol Define __soc_handle_irq as a weak symbol in the common RISC-V privileged instruction set SoC support. This allows overriding __soc_handle_irq for SoCs which are not fully compliant with the RISC-V privileged specification. Signed-off-by: Henrik Brix Andersen --- soc/riscv/riscv-privilege/common/soc_irq.S | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/soc/riscv/riscv-privilege/common/soc_irq.S b/soc/riscv/riscv-privilege/common/soc_irq.S index 3a8904d0437..80b5c1411e7 100644 --- a/soc/riscv/riscv-privilege/common/soc_irq.S +++ b/soc/riscv/riscv-privilege/common/soc_irq.S @@ -14,8 +14,11 @@ #include #include -/* exports */ -GTEXT(__soc_handle_irq) +/* + * __soc_handle_irq is defined as .weak to allow re-implementation by + * SOCs that do not truly follow the riscv privilege specification. + */ +WTEXT(__soc_handle_irq) /* * SOC-specific function to handle pending IRQ number generating the interrupt. @@ -32,7 +35,7 @@ SECTION_FUNC(exception.other, __soc_handle_irq) /* * __soc_is_irq is defined as .weak to allow re-implementation by - * SOCs that does not truly follow the riscv privilege specification. + * SOCs that do not truly follow the riscv privilege specification. */ WTEXT(__soc_is_irq)