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tests: update expected exception codes

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Update expected exception codes for Cortex-M, Cortex-R and Cortex-A
CPUs.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This commit is contained in:
Jordan Yates 2023-01-06 20:38:49 +10:00 • committed by Carles Cufí
commit d8ac658578
3 changed files with 62 additions and 17 deletions
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8
tests/arch/arm/arm_interrupt/src/arm_interrupt.c
View file

@ -166,7 +166,13 @@ ZTEST(arm_interrupt, test_arm_esf_collection)
expected_msp = __get_MSP();
run_esf_validation = 1;
#if defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
expected_reason = K_ERR_ARM_UNDEFINED_INSTRUCTION;
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
expected_reason = K_ERR_ARM_USAGE_UNDEFINED_INSTRUCTION;
#else
expected_reason = K_ERR_CPU_EXCEPTION;
#endif
/* Run test thread and main thread at same priority to guarantee the
* crashy thread we create below runs to completion before we get
@ -468,7 +474,7 @@ ZTEST(arm_interrupt, test_arm_null_pointer_exception)
struct test_struct *test_struct_null_pointer = 0x0;
expected_reason = K_ERR_CPU_EXCEPTION;
expected_reason = K_ERR_ARM_MEM_DATA_ACCESS;
printk("Reading a null pointer value: 0x%0x\n",
test_struct_null_pointer->val[1]);

27
tests/kernel/fatal/exception/src/main.c
View file

@ -45,6 +45,7 @@ static struct k_thread alt_thread;
volatile int rv;
static ZTEST_DMEM volatile int expected_reason = -1;
static ZTEST_DMEM volatile int alternate_reason = -1;
void k_sys_fatal_error_handler(unsigned int reason, const z_arch_esf_t *pEsf)
{
@ -60,18 +61,34 @@ void k_sys_fatal_error_handler(unsigned int reason, const z_arch_esf_t *pEsf)
k_fatal_halt(reason);
}
if (reason != expected_reason) {
printk("Wrong crash type got %d expected %d\n", reason,
expected_reason);
if ((reason != expected_reason) && (reason != alternate_reason)) {
if (alternate_reason != -1) {
printk("Wrong crash type got %d expected %d or %d\n", reason,
expected_reason, alternate_reason);
} else {
printk("Wrong crash type got %d expected %d\n", reason,
expected_reason);
}
k_fatal_halt(reason);
}
expected_reason = -1;
alternate_reason = -1;
}
void entry_cpu_exception(void *p1, void *p2, void *p3)
{
#if defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
expected_reason = K_ERR_ARM_UNDEFINED_INSTRUCTION;
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* The generated exception depends on whether address 0 is valid and it is executed.
* It is not feasible to generically check that here, so accept either faulting reason.
*/
expected_reason = K_ERR_ARM_USAGE_ILLEGAL_EPSR;
alternate_reason = K_ERR_ARM_MEM_INSTRUCTION_ACCESS;
#else
expected_reason = K_ERR_CPU_EXCEPTION;
#endif
#if defined(CONFIG_X86)
__asm__ volatile ("ud2");
@ -96,7 +113,11 @@ void entry_cpu_exception(void *p1, void *p2, void *p3)
void entry_cpu_exception_extend(void *p1, void *p2, void *p3)
{
#if defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
expected_reason = K_ERR_ARM_DEBUG_EVENT;
#else
expected_reason = K_ERR_CPU_EXCEPTION;
#endif
#if defined(CONFIG_ARM64)
__asm__ volatile ("svc 0");

44
tests/kernel/mem_protect/userspace/src/main.c
View file

@ -27,6 +27,14 @@
extern void arm_core_mpu_disable(void);
#endif
#if defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
#define PERMISSION_EXCEPTION K_ERR_ARM_PERMISSION_FAULT
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
#define PERMISSION_EXCEPTION K_ERR_ARM_MEM_DATA_ACCESS
#else
#define PERMISSION_EXCEPTION K_ERR_CPU_EXCEPTION
#endif
#define INFO(fmt, ...) printk(fmt, ##__VA_ARGS__)
#define PIPE_LEN 1
#define BYTES_TO_READ_WRITE 1
@ -151,7 +159,11 @@ ZTEST_USER(userspace, test_write_control)
#else
uint32_t val;
#if defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
set_fault(K_ERR_ARM_UNDEFINED_INSTRUCTION);
#else
set_fault(K_ERR_CPU_EXCEPTION);
#endif
val = __get_SCTLR();
val |= SCTLR_DZ_Msk;
@ -218,7 +230,13 @@ ZTEST_USER(userspace, test_disable_mmu_mpu)
#elif defined(CONFIG_ARM)
#ifndef CONFIG_TRUSTED_EXECUTION_NONSECURE
#if defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
set_fault(K_ERR_ARM_UNDEFINED_INSTRUCTION);
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
set_fault(K_ERR_ARM_BUS_PRECISE_DATA_BUS);
#else
set_fault(K_ERR_CPU_EXCEPTION);
#endif
arm_core_mpu_disable();
#else
@ -258,7 +276,7 @@ ZTEST_USER(userspace, test_read_kernram)
/* Try to read from kernel RAM. */
void *p;
set_fault(K_ERR_CPU_EXCEPTION);
set_fault(PERMISSION_EXCEPTION);
p = _current->init_data;
printk("%p\n", p);
@ -273,7 +291,7 @@ ZTEST_USER(userspace, test_read_kernram)
ZTEST_USER(userspace, test_write_kernram)
{
/* Try to write to kernel RAM. */
set_fault(K_ERR_CPU_EXCEPTION);
set_fault(PERMISSION_EXCEPTION);
_current->init_data = NULL;
zassert_unreachable("Write to kernel RAM did not fault");
@ -308,7 +326,7 @@ ZTEST_USER(userspace, test_write_kernro)
zassert_true(in_rodata,
"_k_neg_eagain is not in rodata");
set_fault(K_ERR_CPU_EXCEPTION);
set_fault(PERMISSION_EXCEPTION);
_k_neg_eagain = -EINVAL;
zassert_unreachable("Write to kernel RO did not fault");
@ -322,7 +340,7 @@ ZTEST_USER(userspace, test_write_kernro)
ZTEST_USER(userspace, test_write_kerntext)
{
/* Try to write to kernel text. */
set_fault(K_ERR_CPU_EXCEPTION);
set_fault(PERMISSION_EXCEPTION);
memset(&z_is_thread_essential, 0, 4);
zassert_unreachable("Write to kernel text did not fault");
@ -337,7 +355,7 @@ static int kernel_data;
*/
ZTEST_USER(userspace, test_read_kernel_data)
{
set_fault(K_ERR_CPU_EXCEPTION);
set_fault(PERMISSION_EXCEPTION);
printk("%d\n", kernel_data);
zassert_unreachable("Read from data did not fault");
@ -350,7 +368,7 @@ ZTEST_USER(userspace, test_read_kernel_data)
*/
ZTEST_USER(userspace, test_write_kernel_data)
{
set_fault(K_ERR_CPU_EXCEPTION);
set_fault(PERMISSION_EXCEPTION);
kernel_data = 1;
zassert_unreachable("Write to data did not fault");
@ -383,7 +401,7 @@ ZTEST_USER(userspace, test_read_priv_stack)
#else
#error "Not implemented for this architecture"
#endif
set_fault(K_ERR_CPU_EXCEPTION);
set_fault(PERMISSION_EXCEPTION);
printk("%c\n", *priv_stack_ptr);
zassert_unreachable("Read from privileged stack did not fault");
@ -407,7 +425,7 @@ ZTEST_USER(userspace, test_write_priv_stack)
#else
#error "Not implemented for this architecture"
#endif
set_fault(K_ERR_CPU_EXCEPTION);
set_fault(PERMISSION_EXCEPTION);
*priv_stack_ptr = 42;
zassert_unreachable("Write to privileged stack did not fault");
@ -472,7 +490,7 @@ static void uthread_read_body(void *p1, void *p2, void *p3)
{
unsigned int *vptr = p1;
set_fault(K_ERR_CPU_EXCEPTION);
set_fault(PERMISSION_EXCEPTION);
printk("%u\n", *vptr);
zassert_unreachable("Read from other thread stack did not fault");
}
@ -481,7 +499,7 @@ static void uthread_write_body(void *p1, void *p2, void *p3)
{
unsigned int *vptr = p1;
set_fault(K_ERR_CPU_EXCEPTION);
set_fault(PERMISSION_EXCEPTION);
*vptr = 2U;
zassert_unreachable("Write to other thread stack did not fault");
}
@ -691,7 +709,7 @@ ZTEST(userspace_domain, test_1st_init_and_access_other_memdomain)
* contains default_bool. This should fault when we try to write it.
*/
k_mem_domain_add_thread(&alternate_domain, k_current_get());
set_fault(K_ERR_CPU_EXCEPTION);
set_fault(PERMISSION_EXCEPTION);
spawn_user(&default_bool);
}
@ -742,7 +760,7 @@ ZTEST(userspace_domain, test_domain_remove_part_drop_to_user)
/* We added alt_part to the default domain in the previous test,
* remove it, and then try to access again.
*/
set_fault(K_ERR_CPU_EXCEPTION);
set_fault(PERMISSION_EXCEPTION);
zassert_equal(
k_mem_domain_remove_partition(&k_mem_domain_default, &alt_part),
@ -792,7 +810,7 @@ ZTEST(userspace_domain_ctx, test_domain_remove_part_context_switch)
/* We added alt_part to the default domain in the previous test,
* remove it, and then try to access again.
*/
set_fault(K_ERR_CPU_EXCEPTION);
set_fault(PERMISSION_EXCEPTION);
zassert_equal(
k_mem_domain_remove_partition(&k_mem_domain_default, &alt_part),