drivers/spi: Cleanup the Kconfig files
Split QMSI relevant part into its own file. Some config where using prompt, some not: normalizing it by removing the prompt keyword where relevant. Reducing the file by using if/endif when relevant. However, it still not fully clean default: cfg and default baudrate should disappear. There is no default configuration to apply as long as the controller is not configured to run from any part using spi API. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
parent
0df7e1c109
commit
d89e8e6a79
6 changed files with 207 additions and 206 deletions
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@ -6,6 +6,17 @@
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# SPDX-License-Identifier: Apache-2.0
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#
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#
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# SPI Drivers
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#
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menuconfig SPI
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bool "SPI hardware bus support"
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default n
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help
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Enable support for the SPI hardware bus.
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if SPI
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config SPI_LEGACY_API
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bool "Use legacy SPI API (default)"
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default y
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@ -13,68 +24,6 @@ config SPI_LEGACY_API
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Driver and user API is the legacy SPI API (spi_legacy.h).
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If unselected, the new API will be used.
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#
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# SPI Drivers
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#
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menuconfig SPI
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bool
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prompt "SPI hardware bus support"
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default n
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help
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Enable support for the SPI hardware bus.
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config SPI_QMSI
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bool "QMSI driver for SPI controller"
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depends on SPI && QMSI
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default n
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help
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SPI driver implementation using QMSI library. QMSI is the
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Quark Microcontroller Software Interface, providing a common
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interface to the Quark family of microcontrollers.
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config SPI_QMSI_SS
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bool "QMSI driver for SPI controller on Sensor Subsystem"
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depends on SPI && QMSI
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default n
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help
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SPI driver implementation using QMSI library. This instance is
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for the Sensor Subsystem.
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config SPI_INTEL
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bool
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prompt "Intel SPI controller driver"
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depends on SPI && CPU_MINUTEIA
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default n
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help
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Enable support for Intel's SPI controllers. Such controller
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was formerly found on XScale chips. It can be found nowadays
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on CEXXXX Intel media controller and Quark CPU (2 of them).
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config SPI_STM32
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bool
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prompt "STM32 MCU SPI controller driver"
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depends on SPI && SOC_FAMILY_STM32
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select HAS_DTS_SPI
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select USE_STM32_LL_SPI
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default n
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help
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Enable SPI support on the STM32 family of processors.
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config SPI_STM32_HAS_FIFO
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bool
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depends on SPI_STM32
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depends on SOC_SERIES_STM32L4X || SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X
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default y
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config SPI_STM32_INTERRUPT
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bool
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prompt "STM32 MCU SPI Interrupt Support"
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depends on SPI_STM32
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default n
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help
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Enable Interrupt support for the SPI Driver of STM32 family.
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if SPI
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config SPI_INIT_PRIORITY
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int "Init priority"
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default 70
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@ -82,9 +31,8 @@ config SPI_INIT_PRIORITY
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Device driver initialization priority.
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config SYS_LOG_SPI_LEVEL
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int
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prompt "SPI Driver Log level"
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depends on SYS_LOG && SPI
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int "SPI Driver Log level"
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depends on SYS_LOG
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default 0
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range 0 4
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help
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@ -104,250 +52,186 @@ config SYS_LOG_SPI_LEVEL
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config SPI_CS_GPIO
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bool "SPI port CS pin is controlled via a GPIO port"
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depends on GPIO
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depends on GPIO && SPI_LEGACY_API
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default n
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config SPI_0
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bool
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prompt "SPI port 0"
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bool "SPI port 0"
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default n
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help
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Enable SPI controller port 0.
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if SPI_0
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config SPI_0_NAME
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string
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prompt "SPI port 0 device name"
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depends on SPI_0
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string "SPI port 0 device name"
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depends on !HAS_DTS_SPI
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default "SPI_0"
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config SPI_0_IRQ_PRI
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int
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prompt "Port 0 interrupt priority"
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depends on SPI_0
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int "Port 0 interrupt priority"
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config SPI_0_DEFAULT_CFG
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hex "Port 0 default configuration"
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depends on SPI_0
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default 0x80
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config SPI_0_DEFAULT_BAUD_RATE
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int "Port 0 default baud rate"
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depends on SPI_0
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default 500000
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config SPI_0_CS_GPIO_PORT
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string
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prompt "The GPIO port which is used to control CS"
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depends on SPI_0 && SPI_CS_GPIO
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string "The GPIO port which is used to control CS"
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depends on SPI_CS_GPIO
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default "GPIO_0"
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config SPI_0_CS_GPIO_PIN
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int "The GPIO PIN which is used to act as a CS pin"
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depends on SPI_0 && SPI_CS_GPIO
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depends on SPI_CS_GPIO
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default 0
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endif # SPI_0
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config SPI_1
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bool
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prompt "SPI port 1"
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bool "SPI port 1"
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default n
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help
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Enable SPI controller port 1.
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if SPI_1
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config SPI_1_NAME
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string
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prompt "SPI port 1 device name"
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depends on SPI_1 && !HAS_DTS_SPI
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string "SPI port 1 device name"
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depends on !HAS_DTS_SPI
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default "SPI_1"
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config SPI_1_IRQ_PRI
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int
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prompt "Port 0 interrupt priority"
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depends on SPI_1 && !HAS_DTS_SPI
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int "Port 0 interrupt priority"
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depends on !HAS_DTS_SPI
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config SPI_1_DEFAULT_CFG
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hex "Port 1 default configuration"
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depends on SPI_1
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default 0x80
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config SPI_1_DEFAULT_BAUD_RATE
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int "Port 1 default baud rate"
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depends on SPI_1
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default 500000
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config SPI_1_CS_GPIO_PORT
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string
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prompt "The GPIO port which is used to control CS"
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depends on SPI_1 && SPI_CS_GPIO
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string "The GPIO port which is used to control CS"
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depends on SPI_CS_GPIO
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default "GPIO_0"
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config SPI_1_CS_GPIO_PIN
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int "The GPIO PIN which is used to act as a CS pin"
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depends on SPI_1 && SPI_CS_GPIO
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depends on SPI_CS_GPIO
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default 0
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endif # SPI_1
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config SPI_2
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bool
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prompt "SPI port 2"
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bool "SPI port 2"
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default n
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help
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Enable SPI controller port 2.
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if SPI_2
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config SPI_2_NAME
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string
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prompt "SPI port 2 device name"
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depends on SPI_2 && !HAS_DTS_SPI
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string "SPI port 2 device name"
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depends on !HAS_DTS_SPI
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default "SPI_2"
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config SPI_2_IRQ_PRI
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int
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prompt "Port 2 interrupt priority"
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depends on SPI_2 && !HAS_DTS_SPI
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int "Port 2 interrupt priority"
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depends on !HAS_DTS_SPI
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config SPI_2_DEFAULT_CFG
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hex "Port 2 default configuration"
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depends on SPI_2
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default 0x80
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config SPI_2_DEFAULT_BAUD_RATE
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int "Port 2 default baud rate"
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depends on SPI_2
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default 500000
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config SPI_2_CS_GPIO_PORT
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string
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prompt "The GPIO port which is used to control CS"
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depends on SPI_2 && SPI_CS_GPIO
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string "The GPIO port which is used to control CS"
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depends on SPI_CS_GPIO
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default "GPIO_0"
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config SPI_2_CS_GPIO_PIN
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int "The GPIO PIN which is used to act as a CS pin"
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depends on SPI_2 && SPI_CS_GPIO
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depends on SPI_CS_GPIO
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default 0
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endif # SPI_2
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config SPI_3
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bool
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prompt "SPI port 3"
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bool "SPI port 3"
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default n
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help
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Enable SPI controller port 3.
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if SPI_3
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config SPI_3_NAME
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string
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prompt "SPI port 3 device name"
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depends on SPI_3 && !HAS_DTS_SPI
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string "SPI port 3 device name"
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depends on !HAS_DTS_SPI
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default "SPI_3"
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config SPI_3_IRQ_PRI
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int
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prompt "Port 3 interrupt priority"
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depends on SPI_3 && !HAS_DTS_SPI
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int "Port 3 interrupt priority"
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depends on !HAS_DTS_SPI
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endif # SPI_3
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config SPI_4
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bool
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prompt "SPI port 4"
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bool "SPI port 4"
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default n
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help
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Enable SPI controller port 4.
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config SPI_4_NAME
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string
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prompt "SPI port 4 device name"
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string "SPI port 4 device name"
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depends on SPI_4
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default "SPI_4"
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config SPI_5
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bool
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prompt "SPI port 5"
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bool "SPI port 5"
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default n
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help
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Enable SPI controller port 5.
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config SPI_5_NAME
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string
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prompt "SPI port 5 device name"
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string "SPI port 5 device name"
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depends on SPI_5
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default "SPI_5"
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config SPI_SS_INIT_PRIORITY
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int "Init priority"
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depends on SPI_QMSI_SS
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default 70
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help
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Device driver initialization priority.
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if SPI_LEGACY_API
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config SPI_SS_CS_GPIO
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bool "SPI port CS pin is controlled via a GPIO port"
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select GPIO
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depends on SPI_QMSI_SS
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default n
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config SPI_SS_0
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bool
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prompt "SPI SS port 0"
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depends on SPI_QMSI_SS
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config SPI_INTEL
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bool "Intel SPI controller driver"
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depends on CPU_MINUTEIA
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default n
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help
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Enable SPI controller port 0.
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Enable support for Intel's SPI controllers. Such controller
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was formerly found on XScale chips. It can be found nowadays
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on CEXXXX Intel media controller and Quark CPU (2 of them).
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config SPI_SS_0_NAME
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string
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prompt "SPI SS port 0 device name"
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depends on SPI_SS_0
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default "SPI_SS_0"
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config SPI_SS_0_IRQ_PRI
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int
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prompt "Port 0 interrupt priority"
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depends on SPI_SS_0
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config SPI_SS_0_CS_GPIO_PORT
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string
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prompt "The GPIO port which is used to control CS"
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depends on SPI_SS_0 && SPI_SS_CS_GPIO
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default "GPIO_0"
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config SPI_SS_0_CS_GPIO_PIN
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int "The GPIO PIN which is used to act as a CS pin"
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depends on SPI_SS_0 && SPI_SS_CS_GPIO
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default 0
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config SPI_SS_1
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bool
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prompt "SPI SS port 1"
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depends on SPI_QMSI_SS
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default n
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help
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Enable SPI controller port 1.
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config SPI_SS_1_NAME
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string
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prompt "SPI port 1 device name"
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depends on SPI_SS_1
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default "SPI_SS_1"
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config SPI_SS_1_IRQ_PRI
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int
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prompt "Port 0 interrupt priority"
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depends on SPI_SS_1
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config SPI_SS_1_CS_GPIO_PORT
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string
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prompt "The GPIO port which is used to control CS"
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depends on SPI_SS_1 && SPI_SS_CS_GPIO
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default "GPIO_0"
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config SPI_SS_1_CS_GPIO_PIN
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int "The GPIO PIN which is used to act as a CS pin"
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depends on SPI_SS_1 && SPI_SS_CS_GPIO
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default 0
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source "drivers/spi/Kconfig.dw"
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source "drivers/spi/Kconfig.qmsi"
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source "drivers/spi/Kconfig.mcux_dspi"
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if SPI_LEGACY_API
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source "drivers/spi/Kconfig.nrf5_legacy"
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endif
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endif # SPI_LEGACY_API
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if !SPI_LEGACY_API
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source "drivers/spi/Kconfig.stm32"
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endif # !SPI_LEGACY_API
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source "drivers/spi/Kconfig.dw"
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source "drivers/spi/Kconfig.sam0"
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@ -7,9 +7,7 @@
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#
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menuconfig SPI_DW
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bool
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prompt "Designware SPI controller driver"
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depends on SPI
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bool "Designware SPI controller driver"
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default n
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help
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Enable support for Designware's SPI controllers.
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@ -25,7 +23,6 @@ config SPI_DW_ARC_AUX_REGS
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registers and thus their access is different than memory
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mapped registers.
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choice
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depends on SPI_DW
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prompt "DesignWare SPI interrupt management logic"
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@ -64,10 +61,8 @@ config SPI_DW_PORT_0_CLOCK_GATE_SUBSYS
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int "Clock controller's subsystem"
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depends on SPI_DW_CLOCK_GATE
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config SPI_DW_PORT_1_CLOCK_GATE_SUBSYS
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int "Clock controller's subsystem"
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depends on SPI_DW_CLOCK_GATE
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endif # SPI_DW
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@ -7,9 +7,8 @@
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#
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menuconfig SPI_MCUX_DSPI
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bool
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prompt "MCUX SPI driver"
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depends on SPI && HAS_MCUX
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bool "MCUX SPI driver"
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depends on HAS_MCUX
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default n
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help
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Enable support for mcux spi driver.
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@ -10,7 +10,7 @@
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menuconfig SPI_NRF5
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bool "nRF5 SPI drivers"
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depends on SPI && SOC_FAMILY_NRF && GPIO_NRF5_P0
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depends on SOC_FAMILY_NRF5 && GPIO_NRF5_P0
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default n
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help
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Enable support for nRF5 MCU series SPI drivers. Peripherals
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92
drivers/spi/Kconfig.qmsi
Normal file
92
drivers/spi/Kconfig.qmsi
Normal file
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@ -0,0 +1,92 @@
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# Kconfig.qmsi - QMSI SPI shim driver configuration options
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#
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# Copyright (c) 2017 Intel Corporation
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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menuconfig SPI_QMSI
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bool "QMSI driver for SPI controller"
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depends on QMSI
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default n
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help
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SPI driver implementation using QMSI library. QMSI is the
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Quark Microcontroller Software Interface, providing a common
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interface to the Quark family of microcontrollers.
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config SPI_QMSI_SS
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bool "QMSI driver for SPI controller on Sensor Subsystem"
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depends on QMSI
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default n
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help
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SPI driver implementation using QMSI library. This instance is
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for the Sensor Subsystem.
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if QMSI_SS
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config SPI_SS_INIT_PRIORITY
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int "Init priority"
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default 70
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help
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Device driver initialization priority.
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config SPI_SS_CS_GPIO
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bool "SPI port CS pin is controlled via a GPIO port"
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select GPIO
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default n
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config SPI_SS_0
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bool "SPI SS port 0"
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default n
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help
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Enable SPI controller port 0.
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if SPI_SS_0
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config SPI_SS_0_NAME
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string "SPI SS port 0 device name"
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default "SPI_SS_0"
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config SPI_SS_0_IRQ_PRI
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int "Port 0 interrupt priority"
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config SPI_SS_0_CS_GPIO_PORT
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string "The GPIO port which is used to control CS"
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depends on SPI_SS_CS_GPIO
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default "GPIO_0"
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config SPI_SS_0_CS_GPIO_PIN
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int "The GPIO PIN which is used to act as a CS pin"
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depends on SPI_SS_CS_GPIO
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default 0
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endif # SPI_SS_0
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config SPI_SS_1
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bool "SPI SS port 1"
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default n
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help
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Enable SPI controller port 1.
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if SPI_SS_1
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config SPI_SS_1_NAME
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string "SPI port 1 device name"
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default "SPI_SS_1"
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config SPI_SS_1_IRQ_PRI
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int "Port 0 interrupt priority"
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||||
|
||||
config SPI_SS_1_CS_GPIO_PORT
|
||||
string "The GPIO port which is used to control CS"
|
||||
depends on SPI_SS_CS_GPIO
|
||||
default "GPIO_0"
|
||||
|
||||
config SPI_SS_1_CS_GPIO_PIN
|
||||
int "The GPIO PIN which is used to act as a CS pin"
|
||||
depends on SPI_SS_CS_GPIO
|
||||
default 0
|
||||
|
||||
endif # SPI_SS_1
|
||||
endif # QMSI_SS
|
31
drivers/spi/Kconfig.stm32
Normal file
31
drivers/spi/Kconfig.stm32
Normal file
|
@ -0,0 +1,31 @@
|
|||
# Kconfig - STM32 SPI driver configuration options
|
||||
|
||||
#
|
||||
# Copyright (c) 2015-2016 Intel Corporation
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
menuconfig SPI_STM32
|
||||
bool "STM32 MCU SPI controller driver"
|
||||
depends on SPI && SOC_FAMILY_STM32
|
||||
select HAS_DTS_SPI
|
||||
select USE_STM32_LL_SPI
|
||||
default n
|
||||
help
|
||||
Enable SPI support on the STM32 family of processors.
|
||||
|
||||
if SPI_STM32
|
||||
|
||||
config SPI_STM32_HAS_FIFO
|
||||
bool
|
||||
depends on SOC_SERIES_STM32L4X || SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X
|
||||
default y
|
||||
|
||||
config SPI_STM32_INTERRUPT
|
||||
bool "STM32 MCU SPI Interrupt Support"
|
||||
default n
|
||||
help
|
||||
Enable Interrupt support for the SPI Driver of STM32 family.
|
||||
|
||||
endif # SPI_STM32
|
Loading…
Add table
Add a link
Reference in a new issue