From d85042f97f4257dd3ea492a80fdeee8dbf0403aa Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 8 Feb 2019 10:52:23 -0600 Subject: [PATCH] soc: nxp_imx: Convert to use DT_ prefixed defines The soc nxp_imx RDC code has been using non DT_ prefixed defines for DT generated defines. Switch to use DT_ prefixed ones as we want to deprecated the non DT_ prefixed defines. Signed-off-by: Kumar Gala --- soc/arm/nxp_imx/mcimx6x_m4/soc.c | 32 ++++++++++++++++---------------- soc/arm/nxp_imx/mcimx7_m4/soc.c | 28 ++++++++++++++-------------- 2 files changed, 30 insertions(+), 30 deletions(-) diff --git a/soc/arm/nxp_imx/mcimx6x_m4/soc.c b/soc/arm/nxp_imx/mcimx6x_m4/soc.c index 882b8f6ef81..d20a3d054df 100644 --- a/soc/arm/nxp_imx/mcimx6x_m4/soc.c +++ b/soc/arm/nxp_imx/mcimx6x_m4/soc.c @@ -23,69 +23,69 @@ static void SOC_RdcInit(void) #ifdef CONFIG_UART_IMX_UART_1 /* Set access to UART_1 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapUart1, UART_1_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapUart1, DT_NXP_IMX_UART_UART_1_RDC, false, false); #endif /* CONFIG_UART_IMX_UART_1 */ #ifdef CONFIG_UART_IMX_UART_2 /* Set access to UART_2 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapUart2, UART_2_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapUart2, DT_NXP_IMX_UART_UART_2_RDC, false, false); #endif /* CONFIG_UART_IMX_UART_2 */ #ifdef CONFIG_UART_IMX_UART_3 /* Set access to UART_3 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapUart3, UART_3_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapUart3, DT_NXP_IMX_UART_UART_3_RDC, false, false); #endif /* CONFIG_UART_IMX_UART_3 */ #ifdef CONFIG_UART_IMX_UART_4 /* Set access to UART_4 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapUart4, UART_4_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapUart4, DT_NXP_IMX_UART_UART_4_RDC, false, false); #endif /* CONFIG_UART_IMX_UART_4 */ #ifdef CONFIG_UART_IMX_UART_5 /* Set access to UART_5 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapUart5, UART_5_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapUart5, DT_NXP_IMX_UART_UART_5_RDC, false, false); #endif /* CONFIG_UART_IMX_UART_5 */ #ifdef CONFIG_UART_IMX_UART_6 /* Set access to UART_6 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapUart6, UART_6_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapUart6, DT_NXP_IMX_UART_UART_6_RDC, false, false); #endif /* CONFIG_UART_IMX_UART_6 */ #ifdef CONFIG_GPIO_IMX_PORT_1 /* Set access to GPIO_1 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapGpio1, GPIO_1_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapGpio1, DT_NXP_IMX_GPIO_GPIO_1_RDC, false, false); #endif /* CONFIG_GPIO_IMX_PORT_1 */ #ifdef CONFIG_GPIO_IMX_PORT_2 /* Set access to GPIO_2 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapGpio2, GPIO_2_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapGpio2, DT_NXP_IMX_GPIO_GPIO_2_RDC, false, false); #endif /* CONFIG_GPIO_IMX_PORT_2 */ #ifdef CONFIG_GPIO_IMX_PORT_3 /* Set access to GPIO_3 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapGpio3, GPIO_3_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapGpio3, DT_NXP_IMX_GPIO_GPIO_3_RDC, false, false); #endif /* CONFIG_GPIO_IMX_PORT_3 */ #ifdef CONFIG_GPIO_IMX_PORT_4 /* Set access to GPIO_4 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapGpio4, GPIO_4_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapGpio4, DT_NXP_IMX_GPIO_GPIO_4_RDC, false, false); #endif /* CONFIG_GPIO_IMX_PORT_4 */ #ifdef CONFIG_GPIO_IMX_PORT_5 /* Set access to GPIO_5 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapGpio5, GPIO_5_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapGpio5, DT_NXP_IMX_GPIO_GPIO_5_RDC, false, false); #endif /* CONFIG_GPIO_IMX_PORT_5 */ #ifdef CONFIG_GPIO_IMX_PORT_6 /* Set access to GPIO_6 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapGpio6, GPIO_6_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapGpio6, DT_NXP_IMX_GPIO_GPIO_6_RDC, false, false); #endif /* CONFIG_GPIO_IMX_PORT_6 */ #ifdef CONFIG_GPIO_IMX_PORT_7 /* Set access to GPIO_7 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapGpio7, GPIO_7_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapGpio7, DT_NXP_IMX_GPIO_GPIO_7_RDC, false, false); #endif /* CONFIG_GPIO_IMX_PORT_7 */ #ifdef CONFIG_IPM_IMX /* Set access to MU B for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapMuB, MU_B_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapMuB, DT_NXP_IMX_MU_MU_B_RDC, false, false); #endif /* CONFIG_IPM_IMX */ #ifdef CONFIG_COUNTER_IMX_EPIT_1 /* Set access to EPIT_1 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapEpit1, EPIT_1_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapEpit1, DT_NXP_IMX_EPIT_EPIT_1_RDC, false, false); #endif /* CONFIG_COUNTER_IMX_EPIT_1 */ #ifdef CONFIG_COUNTER_IMX_EPIT_2 /* Set access to EPIT_2 for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapEpit2, EPIT_2_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapEpit2, DT_NXP_IMX_EPIT_EPIT_2_RDC, false, false); #endif /* CONFIG_COUNTER_IMX_EPIT_2 */ } diff --git a/soc/arm/nxp_imx/mcimx7_m4/soc.c b/soc/arm/nxp_imx/mcimx7_m4/soc.c index bd8c22751eb..d232ef97ee0 100644 --- a/soc/arm/nxp_imx/mcimx7_m4/soc.c +++ b/soc/arm/nxp_imx/mcimx7_m4/soc.c @@ -57,21 +57,21 @@ static void nxp_mcimx7_gpio_config(void) { #ifdef CONFIG_GPIO_IMX_PORT_1 - RDC_SetPdapAccess(RDC, rdcPdapGpio1, GPIO_1_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapGpio1, DT_NXP_IMX_GPIO_GPIO_1_RDC, false, false); /* Enable gpio clock gate */ CCM_ControlGate(CCM, ccmCcgrGateGpio1, ccmClockNeededRunWait); #endif /* CONFIG_GPIO_IMX_PORT_1 */ #ifdef CONFIG_GPIO_IMX_PORT_2 - RDC_SetPdapAccess(RDC, rdcPdapGpio2, GPIO_2_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapGpio2, DT_NXP_IMX_GPIO_GPIO_2_RDC, false, false); /* Enable gpio clock gate */ CCM_ControlGate(CCM, ccmCcgrGateGpio2, ccmClockNeededRunWait); #endif /* CONFIG_GPIO_IMX_PORT_2 */ #ifdef CONFIG_GPIO_IMX_PORT_7 - RDC_SetPdapAccess(RDC, rdcPdapGpio7, GPIO_7_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapGpio7, DT_NXP_IMX_GPIO_GPIO_7_RDC, false, false); /* Enable gpio clock gate */ CCM_ControlGate(CCM, ccmCcgrGateGpio7, ccmClockNeededRunWait); #endif /* CONFIG_GPIO_IMX_PORT_2 */ @@ -85,7 +85,7 @@ static void nxp_mcimx7_uart_config(void) #ifdef CONFIG_UART_IMX_UART_2 /* We need to grasp board uart exclusively */ - RDC_SetPdapAccess(RDC, rdcPdapUart2, UART_2_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapUart2, DT_NXP_IMX_UART_UART_2_RDC, false, false); /* Select clock derived from OSC clock(24M) */ CCM_UpdateRoot(CCM, ccmRootUart2, ccmRootmuxUartOsc24m, 0, 0); /* Enable uart clock */ @@ -100,7 +100,7 @@ static void nxp_mcimx7_uart_config(void) #ifdef CONFIG_UART_IMX_UART_6 /* We need to grasp board uart exclusively */ - RDC_SetPdapAccess(RDC, rdcPdapUart6, UART_6_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapUart6, DT_NXP_IMX_UART_UART_6_RDC, false, false); /* Select clock derived from OSC clock(24M) */ CCM_UpdateRoot(CCM, ccmRootUart6, ccmRootmuxUartOsc24m, 0, 0); /* Enable uart clock */ @@ -122,7 +122,7 @@ static void nxp_mcimx7_i2c_config(void) #ifdef CONFIG_I2C_1 /* In this example, we need to grasp board I2C exclusively */ - RDC_SetPdapAccess(RDC, rdcPdapI2c1, I2C_1_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapI2c1, DT_FSL_IMX7D_I2C_I2C_1_RDC, false, false); /* Select I2C clock derived from OSC clock(24M) */ CCM_UpdateRoot(CCM, ccmRootI2c1, ccmRootmuxI2cOsc24m, 0, 0); /* Enable I2C clock */ @@ -132,7 +132,7 @@ static void nxp_mcimx7_i2c_config(void) #ifdef CONFIG_I2C_2 /* In this example, we need to grasp board I2C exclusively */ - RDC_SetPdapAccess(RDC, rdcPdapI2c2, I2C_2_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapI2c2, DT_FSL_IMX7D_I2C_I2C_2_RDC, false, false); /* Select I2C clock derived from OSC clock(24M) */ CCM_UpdateRoot(CCM, ccmRootI2c2, ccmRootmuxI2cOsc24m, 0, 0); /* Enable I2C clock */ @@ -142,7 +142,7 @@ static void nxp_mcimx7_i2c_config(void) #ifdef CONFIG_I2C_3 /* In this example, we need to grasp board I2C exclusively */ - RDC_SetPdapAccess(RDC, rdcPdapI2c3, I2C_3_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapI2c3, DT_FSL_IMX7D_I2C_I2C_3_RDC, false, false); /* Select I2C clock derived from OSC clock(24M) */ CCM_UpdateRoot(CCM, ccmRootI2c3, ccmRootmuxI2cOsc24m, 0, 0); /* Enable I2C clock */ @@ -152,7 +152,7 @@ static void nxp_mcimx7_i2c_config(void) #ifdef CONFIG_I2C_4 /* In this example, we need to grasp board I2C exclusively */ - RDC_SetPdapAccess(RDC, rdcPdapI2c4, I2C_4_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapI2c4, DT_FSL_IMX7D_I2C_I2C_4_RDC, false, false); /* Select I2C clock derived from OSC clock(24M) */ CCM_UpdateRoot(CCM, ccmRootI2c4, ccmRootmuxI2cOsc24m, 0, 0); /* Enable I2C clock */ @@ -169,7 +169,7 @@ static void nxp_mcimx7_pwm_config(void) #ifdef CONFIG_PWM_1 /* We need to grasp board pwm exclusively */ - RDC_SetPdapAccess(RDC, rdcPdapPwm1, PWM_1_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapPwm1, DT_FSL_IMX7D_PWM_PWM_1_RDC, false, false); /* Select clock derived from OSC clock(24M) */ CCM_UpdateRoot(CCM, ccmRootPwm1, ccmRootmuxPwmOsc24m, 0, 0); /* Enable pwm clock */ @@ -179,7 +179,7 @@ static void nxp_mcimx7_pwm_config(void) #ifdef CONFIG_PWM_2 /* We need to grasp board pwm exclusively */ - RDC_SetPdapAccess(RDC, rdcPdapPwm2, PWM_2_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapPwm2, DT_FSL_IMX7D_PWM_PWM_2_RDC, false, false); /* Select clock derived from OSC clock(24M) */ CCM_UpdateRoot(CCM, ccmRootPwm2, ccmRootmuxPwmOsc24m, 0, 0); /* Enable pwm clock */ @@ -189,7 +189,7 @@ static void nxp_mcimx7_pwm_config(void) #ifdef CONFIG_PWM_3 /* We need to grasp board pwm exclusively */ - RDC_SetPdapAccess(RDC, rdcPdapPwm3, PWM_3_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapPwm3, DT_FSL_IMX7D_PWM_PWM_3_RDC, false, false); /* Select clock derived from OSC clock(24M) */ CCM_UpdateRoot(CCM, ccmRootPwm3, ccmRootmuxPwmOsc24m, 0, 0); /* Enable pwm clock */ @@ -199,7 +199,7 @@ static void nxp_mcimx7_pwm_config(void) #ifdef CONFIG_PWM_4 /* We need to grasp board pwm exclusively */ - RDC_SetPdapAccess(RDC, rdcPdapPwm4, PWM_4_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapPwm4, DT_FSL_IMX7D_PWM_PWM_4_RDC, false, false); /* Select clock derived from OSC clock(24M) */ CCM_UpdateRoot(CCM, ccmRootPwm4, ccmRootmuxPwmOsc24m, 0, 0); /* Enable pwm clock */ @@ -214,7 +214,7 @@ static void nxp_mcimx7_pwm_config(void) static void nxp_mcimx7_mu_config(void) { /* Set access to MU B for M4 core */ - RDC_SetPdapAccess(RDC, rdcPdapMuB, MU_B_RDC, false, false); + RDC_SetPdapAccess(RDC, rdcPdapMuB, DT_NXP_IMX_MU_MU_B_RDC, false, false); /* Enable clock gate for MU*/ CCM_ControlGate(CCM, ccmCcgrGateMu, ccmClockNeededRun);