drivers: i2s_cavs: macros for object instantiation
Add macros to define and instantiate driver objects for multiple instances Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
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1 changed files with 98 additions and 124 deletions
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@ -28,6 +28,79 @@
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#include <logging/log.h>
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LOG_MODULE_REGISTER(LOG_DOMAIN);
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#define I2S_IRQ_CONNECT(i2s_id) \
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IRQ_CONNECT(I2S##i2s_id##_CAVS_IRQ, \
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CONFIG_I2S_CAVS_IRQ_PRI, \
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i2s_cavs_isr, \
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DEVICE_GET(i2s##i2s_id##_cavs), 0)
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#define I2S_DEVICE_NAME(i2s_id) i2s##i2s_id##_cavs
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#define I2S_DEVICE_DATA_NAME(i2s_id) i2s##i2s_id##_cavs_data
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#define I2S_DEVICE_CONFIG_NAME(i2s_id) i2s##i2s_id##_cavs_config
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#define I2S_DEVICE_CONFIG_DEFINE(i2s_id) \
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static const struct i2s_cavs_config i2s##i2s_id##_cavs_config = {\
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.regs = (struct i2s_cavs_ssp *)SSP_BASE(i2s_id), \
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.mn_regs = (struct i2s_cavs_mn_div *)SSP_MN_DIV_BASE(i2s_id),\
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.irq_id = I2S##i2s_id##_CAVS_IRQ, \
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.irq_connect = i2s##i2s_id##_cavs_irq_connect, \
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}
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#define I2S_DMA_CHANNEL(i2s_id, dir) \
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CONFIG_I2S_CAVS_##i2s_id##_DMA_##dir##_CHANNEL
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#define I2S_DEVICE_OBJECT_DECLARE(i2s_id) \
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DEVICE_DECLARE(I2S_DEVICE_NAME(i2s_id))
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#define I2S_DEVICE_OBJECT(i2s_id) \
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DEVICE_GET(I2S_DEVICE_NAME(i2s_id))
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#define I2S_DEVICE_DATA_DEFINE(i2s_id) \
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static struct i2s_cavs_dev_data i2s##i2s_id##_cavs_data = {\
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.tx = { \
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.dma_channel = I2S_DMA_CHANNEL(i2s_id, TX), \
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.dma_cfg = { \
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.source_burst_length = CAVS_I2S_DMA_BURST_SIZE,\
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.dest_burst_length = CAVS_I2S_DMA_BURST_SIZE,\
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.dma_callback = i2s_dma_tx_callback, \
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.callback_arg = I2S_DEVICE_OBJECT(i2s_id),\
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.complete_callback_en = 1, \
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.error_callback_en = 1, \
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.block_count = 1, \
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.head_block = \
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&i2s##i2s_id##_cavs_data.tx.dma_block,\
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.channel_direction = MEMORY_TO_PERIPHERAL,\
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.dma_slot = DMA_HANDSHAKE_SSP##i2s_id##_TX,\
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}, \
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}, \
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.rx = { \
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.dma_channel = I2S_DMA_CHANNEL(i2s_id, RX), \
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.dma_cfg = { \
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.source_burst_length = CAVS_I2S_DMA_BURST_SIZE,\
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.dest_burst_length = CAVS_I2S_DMA_BURST_SIZE,\
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.dma_callback = i2s_dma_rx_callback,\
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.callback_arg = I2S_DEVICE_OBJECT(i2s_id),\
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.complete_callback_en = 1, \
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.error_callback_en = 1, \
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.block_count = 1, \
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.head_block = \
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&i2s##i2s_id##_cavs_data.rx.dma_block,\
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.channel_direction = PERIPHERAL_TO_MEMORY,\
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.dma_slot = DMA_HANDSHAKE_SSP##i2s_id##_RX,\
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}, \
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}, \
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}
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#define I2S_DEVICE_AND_API_INIT(i2s_id) \
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DEVICE_AND_API_INIT(I2S_DEVICE_NAME(i2s_id), \
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CONFIG_I2S_CAVS_##i2s_id##_NAME, \
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i2s_cavs_initialize, \
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&I2S_DEVICE_DATA_NAME(i2s_id), \
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&I2S_DEVICE_CONFIG_NAME(i2s_id), \
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POST_KERNEL, \
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CONFIG_I2S_INIT_PRIORITY, \
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&i2s_cavs_driver_api)
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/* length of the buffer queue */
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#define I2S_CAVS_BUF_Q_LEN 2
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@ -85,6 +158,7 @@ struct i2s_cavs_config {
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struct i2s_cavs_ssp *regs;
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struct i2s_cavs_mn_div *mn_regs;
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u32_t irq_id;
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void (*irq_connect)(void);
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};
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/* Device run time data */
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@ -101,9 +175,9 @@ struct i2s_cavs_dev_data {
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#define DEV_DATA(dev) \
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((struct i2s_cavs_dev_data *const)(dev)->driver_data)
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static struct device DEVICE_NAME_GET(i2s1_cavs);
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static struct device DEVICE_NAME_GET(i2s2_cavs);
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static struct device DEVICE_NAME_GET(i2s3_cavs);
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I2S_DEVICE_OBJECT_DECLARE(1);
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I2S_DEVICE_OBJECT_DECLARE(2);
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I2S_DEVICE_OBJECT_DECLARE(3);
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static void i2s_dma_tx_callback(void *, u32_t, int);
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static void i2s_tx_stream_disable(struct i2s_cavs_dev_data *,
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@ -802,129 +876,29 @@ static const struct i2s_driver_api i2s_cavs_driver_api = {
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.trigger = i2s_cavs_trigger,
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};
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static const struct i2s_cavs_config i2s1_cavs_config = {
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.regs = (struct i2s_cavs_ssp *)SSP_BASE(1),
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.mn_regs = (struct i2s_cavs_mn_div *)SSP_MN_DIV_BASE(1),
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.irq_id = I2S1_CAVS_IRQ,
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};
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static void i2s1_cavs_irq_connect(void)
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{
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I2S_IRQ_CONNECT(1);
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}
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static const struct i2s_cavs_config i2s2_cavs_config = {
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.regs = (struct i2s_cavs_ssp *)SSP_BASE(2),
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.mn_regs = (struct i2s_cavs_mn_div *)SSP_MN_DIV_BASE(2),
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.irq_id = I2S2_CAVS_IRQ,
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};
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I2S_DEVICE_CONFIG_DEFINE(1);
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I2S_DEVICE_DATA_DEFINE(1);
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I2S_DEVICE_AND_API_INIT(1);
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static const struct i2s_cavs_config i2s3_cavs_config = {
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.regs = (struct i2s_cavs_ssp *)SSP_BASE(3),
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.mn_regs = (struct i2s_cavs_mn_div *)SSP_MN_DIV_BASE(3),
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.irq_id = I2S3_CAVS_IRQ,
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};
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static void i2s2_cavs_irq_connect(void)
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{
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I2S_IRQ_CONNECT(2);
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}
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static struct i2s_cavs_dev_data i2s1_cavs_data = {
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.tx = {
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.dma_channel = CONFIG_I2S_CAVS_1_DMA_TX_CHANNEL,
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.dma_cfg = {
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.source_burst_length = CAVS_I2S_DMA_BURST_SIZE,
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.dest_burst_length = CAVS_I2S_DMA_BURST_SIZE,
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.dma_callback = i2s_dma_tx_callback,
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.callback_arg = &DEVICE_NAME_GET(i2s1_cavs),
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.complete_callback_en = 1,
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.error_callback_en = 1,
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.block_count = 1,
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.head_block = &i2s1_cavs_data.tx.dma_block,
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.channel_direction = MEMORY_TO_PERIPHERAL,
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.dma_slot = DMA_HANDSHAKE_SSP1_TX,
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},
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},
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.rx = {
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.dma_channel = CONFIG_I2S_CAVS_1_DMA_RX_CHANNEL,
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.dma_cfg = {
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.source_burst_length = CAVS_I2S_DMA_BURST_SIZE,
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.dest_burst_length = CAVS_I2S_DMA_BURST_SIZE,
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.dma_callback = i2s_dma_rx_callback,
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.callback_arg = &DEVICE_NAME_GET(i2s1_cavs),
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.complete_callback_en = 1,
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.error_callback_en = 1,
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.block_count = 1,
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.head_block = &i2s1_cavs_data.rx.dma_block,
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.channel_direction = PERIPHERAL_TO_MEMORY,
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.dma_slot = DMA_HANDSHAKE_SSP1_RX,
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},
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}
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};
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I2S_DEVICE_CONFIG_DEFINE(2);
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I2S_DEVICE_DATA_DEFINE(2);
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I2S_DEVICE_AND_API_INIT(2);
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static struct i2s_cavs_dev_data i2s2_cavs_data = {
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.tx = {
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.dma_channel = CONFIG_I2S_CAVS_2_DMA_TX_CHANNEL,
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.dma_cfg = {
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.source_burst_length = CAVS_I2S_DMA_BURST_SIZE,
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.dest_burst_length = CAVS_I2S_DMA_BURST_SIZE,
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.dma_callback = i2s_dma_tx_callback,
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.callback_arg = &DEVICE_NAME_GET(i2s2_cavs),
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.complete_callback_en = 1,
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.error_callback_en = 1,
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.block_count = 1,
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.head_block = &i2s2_cavs_data.tx.dma_block,
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.channel_direction = MEMORY_TO_PERIPHERAL,
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.dma_slot = DMA_HANDSHAKE_SSP2_TX,
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},
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},
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.rx = {
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.dma_channel = CONFIG_I2S_CAVS_2_DMA_RX_CHANNEL,
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.dma_cfg = {
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.source_burst_length = CAVS_I2S_DMA_BURST_SIZE,
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.dest_burst_length = CAVS_I2S_DMA_BURST_SIZE,
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.dma_callback = i2s_dma_rx_callback,
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.callback_arg = &DEVICE_NAME_GET(i2s2_cavs),
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.complete_callback_en = 1,
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.error_callback_en = 1,
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.block_count = 1,
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.head_block = &i2s2_cavs_data.rx.dma_block,
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.channel_direction = PERIPHERAL_TO_MEMORY,
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.dma_slot = DMA_HANDSHAKE_SSP2_RX,
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},
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},
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};
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static void i2s3_cavs_irq_connect(void)
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{
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I2S_IRQ_CONNECT(3);
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}
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static struct i2s_cavs_dev_data i2s3_cavs_data = {
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.tx = {
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.dma_channel = CONFIG_I2S_CAVS_3_DMA_TX_CHANNEL,
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.dma_cfg = {
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.source_burst_length = CAVS_I2S_DMA_BURST_SIZE,
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.dest_burst_length = CAVS_I2S_DMA_BURST_SIZE,
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.dma_callback = i2s_dma_tx_callback,
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.callback_arg = &DEVICE_NAME_GET(i2s3_cavs),
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.complete_callback_en = 1,
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.error_callback_en = 1,
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.block_count = 1,
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.head_block = &i2s3_cavs_data.tx.dma_block,
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.channel_direction = MEMORY_TO_PERIPHERAL,
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.dma_slot = DMA_HANDSHAKE_SSP3_TX,
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},
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},
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.rx = {
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.dma_channel = CONFIG_I2S_CAVS_3_DMA_RX_CHANNEL,
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.dma_cfg = {
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.source_burst_length = CAVS_I2S_DMA_BURST_SIZE,
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.dest_burst_length = CAVS_I2S_DMA_BURST_SIZE,
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.dma_callback = i2s_dma_rx_callback,
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.callback_arg = &DEVICE_NAME_GET(i2s3_cavs),
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.complete_callback_en = 1,
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.error_callback_en = 1,
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.block_count = 1,
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.head_block = &i2s3_cavs_data.rx.dma_block,
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.channel_direction = PERIPHERAL_TO_MEMORY,
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.dma_slot = DMA_HANDSHAKE_SSP3_RX,
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},
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},
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};
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DEVICE_AND_API_INIT(i2s1_cavs, CONFIG_I2S_CAVS_1_NAME, i2s_cavs_initialize,
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&i2s1_cavs_data, &i2s1_cavs_config, POST_KERNEL,
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CONFIG_I2S_INIT_PRIORITY, &i2s_cavs_driver_api);
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DEVICE_AND_API_INIT(i2s2_cavs, CONFIG_I2S_CAVS_2_NAME, i2s_cavs_initialize,
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&i2s2_cavs_data, &i2s2_cavs_config, POST_KERNEL,
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CONFIG_I2S_INIT_PRIORITY, &i2s_cavs_driver_api);
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DEVICE_AND_API_INIT(i2s3_cavs, CONFIG_I2S_CAVS_3_NAME, i2s_cavs_initialize,
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&i2s3_cavs_data, &i2s3_cavs_config, POST_KERNEL,
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CONFIG_I2S_INIT_PRIORITY, &i2s_cavs_driver_api);
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I2S_DEVICE_CONFIG_DEFINE(3);
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I2S_DEVICE_DATA_DEFINE(3);
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I2S_DEVICE_AND_API_INIT(3);
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