drivers: can: Update sam canfd driver to use pinctrl

This update Atmel sam canfd driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. In addition this
add missing entries to run automated tests for can/canfd drivers.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

boards/arm/sam_e70_xplained/sam_e70_xplained-common.dtsi

@@ -177,7 +177,10 @@ zephyr_udc0: &usbhs {
 
 &can0 {
 	status = "okay";
-	pinctrl-0 = <&pb3a_can0_rx0 &pb2a_can0_tx0>;
+
+	pinctrl-0 = <&can0_default>;
+	pinctrl-names = "default";
+
 	bus-speed = <125000>;
 	bus-speed-data = <1000000>;
 

boards/arm/sam_e70_xplained/sam_e70_xplained-pinctrl.dtsi

@@ -20,6 +20,13 @@
 		};
 	};
 
+	can0_default: can0_default {
+		group1 {
+			pinmux = <PB3A_CAN0_RX>,
+				 <PB2A_CAN0_TX>;
+		};
+	};
+
 	spi0_default: spi0_default {
 		group1 {
 			pinmux = <PD20B_SPI0_MISO>,

boards/arm/sam_e70_xplained/sam_e70b_xplained.yaml

@@ -16,4 +16,6 @@ supported:
   - watchdog
   - usb_device
   - pwm
+  - can
+  - canfd
   - hwinfo

boards/arm/sam_v71_xult/sam_v71_xult-common.dtsi

@@ -305,7 +305,10 @@ zephyr_udc0: &usbhs {
 
 &can1 {
 	status = "okay";
-	pinctrl-0 = <&pc12c_can1_rx1 &pc14c_can1_tx1>;
+
+	pinctrl-0 = <&can1_default>;
+	pinctrl-names = "default";
+
 	bus-speed = <125000>;
 	bus-speed-data = <1000000>;
 

boards/arm/sam_v71_xult/sam_v71_xult-pinctrl.dtsi

@@ -20,6 +20,13 @@
 		};
 	};
 
+	can1_default: can1_default {
+		group1 {
+			pinmux = <PC12C_CAN1_RX>,
+				 <PC14C_CAN1_TX>;
+		};
+	};
+
 	spi0_default: spi0_default {
 		group1 {
 			pinmux = <PD20B_SPI0_MISO>,

boards/arm/sam_v71_xult/sam_v71b_xult.yaml

@@ -21,4 +21,6 @@ supported:
   - xpro_i2c
   - xpro_serial
   - xpro_spi
+  - can
+  - canfd
   - hwinfo

drivers/can/can_sam.c

@@ -8,6 +8,7 @@
 
 #include <drivers/can.h>
 #include <drivers/can/transceiver.h>
+#include <drivers/pinctrl.h>
 #include <soc.h>
 #include <kernel.h>
 #include <logging/log.h>
@@ -19,7 +20,7 @@ LOG_MODULE_REGISTER(can_sam, CONFIG_CAN_LOG_LEVEL);
 struct can_sam_config {
 	struct can_mcan_config mcan_cfg;
 	void (*config_irq)(void);
-	struct soc_gpio_pin pin_list[2];
+	const struct pinctrl_dev_config *pcfg;
 	uint8_t pmc_id;
 };
 
@@ -62,7 +63,12 @@ static int can_sam_init(const struct device *dev)
 	int ret;
 
 	can_sam_clock_enable(cfg);
-	soc_gpio_list_configure(cfg->pin_list, ARRAY_SIZE(cfg->pin_list));
+
+	ret = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
+	if (ret < 0) {
+		return ret;
+	}
+
 	ret = can_mcan_init(dev, mcan_cfg, msg_ram, mcan_data);
 	if (ret) {
 		return ret;
@@ -255,7 +261,7 @@ static void config_can_##inst##_irq(void)
 #define CAN_SAM_CFG_INST(inst)                                                                 \
 static const struct can_sam_config can_sam_cfg_##inst = {                                      \
 	.pmc_id = DT_INST_PROP(inst, peripheral_id),                                           \
-	.pin_list = { ATMEL_SAM_DT_INST_PIN(inst, 0), ATMEL_SAM_DT_INST_PIN(inst, 1) },        \
+	.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst),                                          \
 	.config_irq = config_can_##inst##_irq,                                                 \
 	.mcan_cfg = CAN_SAM_MCAN_CFG(inst)                                                     \
 };
@@ -268,6 +274,7 @@ DEVICE_DT_INST_DEFINE(inst, &can_sam_init, NULL, &can_sam_dev_data_##inst,
 		      &can_api_funcs);
 
 #define CAN_SAM_INST(inst)                                                     \
+	PINCTRL_DT_INST_DEFINE(inst);                                          \
 	CAN_SAM_IRQ_CFG_FUNCTION(inst)                                         \
 	CAN_SAM_CFG_INST(inst)                                                 \
 	CAN_SAM_DATA_INST(inst)                                                \

dts/bindings/can/atmel,sam-can.yaml

@@ -2,18 +2,12 @@ description: Specialization of Bosch m_can CAN-FD controller for Atmel SAM
 
 compatible: "atmel,sam-can"
 
-include: bosch,m-can.yaml
+include:
+    - name: bosch,m-can.yaml
+    - name: pinctrl-device.yaml
 
 properties:
     peripheral-id:
       type: int
       required: true
       description: peripheral ID
-    pinctrl-0:
-      type: phandles
-      required: true
-      description: |
-        PIO configuration for CAN_RX and CAN_TX. We expect that the phandles will
-        reference pinctrl nodes.  These nodes will have a nodelabel that
-        matches the Atmel SoC HAL defines and be of the form
-          pinctrl-0 = <&pb3a_can0_rx0 &pb2a_can0_tx0>;