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drivers/serial: stm32: Get clocks information from device tree

Browse source 
Provide CONFIG macros for clocks bits and bus properties in fixup
files and use them to simplify logic in uart devices instanciation
code

Fixes #10448

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2018-11-08 14:38:48 +01:00 • committed by Anas Nashif
commit d76a5592e4
9 changed files with 100 additions and 30 deletions
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58
drivers/serial/uart_stm32.c
View file

@ -363,10 +363,6 @@ static int uart_stm32_init(struct device *dev)
return 0;
}
/* Define clocks */
#define STM32_CLOCK_UART(clock_bus, clock_enr) \
.pclken = { .bus = clock_bus, \
.enr = clock_enr }
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
#define STM32_UART_IRQ_HANDLER_DECL(name) \
@ -388,7 +384,7 @@ static void uart_stm32_irq_config_func_##name(struct device *dev) \
#define STM32_UART_IRQ_HANDLER(name)
#endif
#define STM32_UART_INIT(name, clock_bus, clock_enr) \
#define STM32_UART_INIT(name) \
STM32_UART_IRQ_HANDLER_DECL(name); \
\
static const struct uart_stm32_config uart_stm32_cfg_##name = { \
@ -396,7 +392,9 @@ static const struct uart_stm32_config uart_stm32_cfg_##name = { \
.base = (u8_t *)CONFIG_UART_STM32_##name##_BASE_ADDRESS,\
STM32_UART_IRQ_HANDLER_FUNC(name) \
}, \
STM32_CLOCK_UART(clock_bus, clock_enr), \
.pclken = { .bus = CONFIG_UART_STM32_##name##_CLOCK_BUS, \
.enr = CONFIG_UART_STM32_##name##_CLOCK_BITS \
}, \
.baud_rate = CONFIG_UART_STM32_##name##_BAUD_RATE \
}; \
\
@ -419,104 +417,104 @@ STM32_UART_IRQ_HANDLER(name)
#if defined(CONFIG_SOC_SERIES_STM32F0X)
#ifdef CONFIG_UART_STM32_PORT_1
STM32_UART_INIT(USART_1, STM32_CLOCK_BUS_APB1_2, LL_APB1_GRP2_PERIPH_USART1)
STM32_UART_INIT(USART_1)
#endif /* CONFIG_UART_STM32_PORT_1 */
#ifdef CONFIG_UART_STM32_PORT_2
STM32_UART_INIT(USART_2, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_USART2)
STM32_UART_INIT(USART_2)
#endif /* CONFIG_UART_STM32_PORT_2 */
#ifdef CONFIG_UART_STM32_PORT_3
STM32_UART_INIT(USART_3, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_USART3)
STM32_UART_INIT(USART_3)
#endif /* CONFIG_UART_STM32_PORT_3 */
#ifdef CONFIG_UART_STM32_PORT_4
STM32_UART_INIT(USART_4, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_USART4)
STM32_UART_INIT(USART_4)
#endif /* CONFIG_UART_STM32_PORT_4 */
#ifdef CONFIG_UART_STM32_PORT_5
STM32_UART_INIT(USART_5, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_USART5)
STM32_UART_INIT(USART_5)
#endif /* CONFIG_UART_STM32_PORT_5 */
#ifdef CONFIG_UART_STM32_PORT_6
STM32_UART_INIT(USART_6, STM32_CLOCK_BUS_APB1_2, LL_APB1_GRP2_PERIPH_USART6)
STM32_UART_INIT(USART_6)
#endif /* CONFIG_UART_STM32_PORT_6 */
#ifdef CONFIG_UART_STM32_PORT_7
STM32_UART_INIT(USART_7, STM32_CLOCK_BUS_APB1_2, LL_APB1_GRP2_PERIPH_USART7)
STM32_UART_INIT(USART_7)
#endif /* CONFIG_UART_STM32_PORT_7 */
#ifdef CONFIG_UART_STM32_PORT_8
STM32_UART_INIT(USART_8, STM32_CLOCK_BUS_APB1_2, LL_APB1_GRP2_PERIPH_USART8)
STM32_UART_INIT(USART_8)
#endif /* CONFIG_UART_STM32_PORT_8 */
#elif defined(CONFIG_SOC_SERIES_STM32L0X)
#ifdef CONFIG_UART_STM32_PORT_1
STM32_UART_INIT(USART_1, STM32_CLOCK_BUS_APB2, LL_APB2_GRP1_PERIPH_USART1)
STM32_UART_INIT(USART_1)
#endif /* CONFIG_UART_STM32_PORT_1 */
#ifdef CONFIG_UART_STM32_PORT_2
STM32_UART_INIT(USART_2, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_USART2)
STM32_UART_INIT(USART_2)
#endif /* CONFIG_UART_STM32_PORT_2 */
#ifdef CONFIG_UART_STM32_PORT_4
STM32_UART_INIT(USART_4, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_USART4)
STM32_UART_INIT(USART_4)
#endif /* CONFIG_UART_STM32_PORT_4 */
#ifdef CONFIG_UART_STM32_PORT_5
STM32_UART_INIT(USART_5, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_USART5)
STM32_UART_INIT(USART_5)
#endif /* CONFIG_UART_STM32_PORT_5 */
#ifdef CONFIG_UART_STM32_LPUART_1
STM32_UART_INIT(LPUART_1, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_LPUART1)
STM32_UART_INIT(LPUART_1)
#endif /* CONFIG_UART_STM32_LPUART_1 */
#else
#ifdef CONFIG_UART_STM32_PORT_1
STM32_UART_INIT(USART_1, STM32_CLOCK_BUS_APB2, LL_APB2_GRP1_PERIPH_USART1)
STM32_UART_INIT(USART_1)
#endif /* CONFIG_UART_STM32_PORT_1 */
#ifdef CONFIG_UART_STM32_PORT_2
STM32_UART_INIT(USART_2, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_USART2)
STM32_UART_INIT(USART_2)
#endif /* CONFIG_UART_STM32_PORT_2 */
#ifdef CONFIG_UART_STM32_PORT_3
STM32_UART_INIT(USART_3, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_USART3)
STM32_UART_INIT(USART_3)
#endif /* CONFIG_UART_STM32_PORT_3 */
#ifdef CONFIG_UART_STM32_PORT_4
STM32_UART_INIT(UART_4, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_UART4)
STM32_UART_INIT(UART_4)
#endif /* CONFIG_UART_STM32_PORT_4 */
#ifdef CONFIG_UART_STM32_PORT_5
STM32_UART_INIT(UART_5, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_UART5)
STM32_UART_INIT(UART_5)
#endif /* CONFIG_UART_STM32_PORT_5 */
#ifdef CONFIG_UART_STM32_PORT_6
STM32_UART_INIT(USART_6, STM32_CLOCK_BUS_APB2, LL_APB2_GRP1_PERIPH_USART6)
STM32_UART_INIT(USART_6)
#endif /* CONFIG_UART_STM32_PORT_6 */
#ifdef CONFIG_UART_STM32_PORT_7
STM32_UART_INIT(UART_7, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_UART7)
STM32_UART_INIT(UART_7)
#endif /* CONFIG_UART_STM32_PORT_7 */
#ifdef CONFIG_UART_STM32_PORT_8
STM32_UART_INIT(UART_8, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_UART8)
STM32_UART_INIT(UART_8)
#endif /* CONFIG_UART_STM32_PORT_8 */
#ifdef CONFIG_UART_STM32_PORT_9
STM32_UART_INIT(UART_9, STM32_CLOCK_BUS_APB2, LL_APB2_GRP1_PERIPH_UART9)
STM32_UART_INIT(UART_9)
#endif /* CONFIG_UART_STM32_PORT_9 */
#ifdef CONFIG_UART_STM32_PORT_10
STM32_UART_INIT(UART_10, STM32_CLOCK_BUS_APB2, LL_APB2_GRP1_PERIPH_UART10)
STM32_UART_INIT(UART_10)
#endif /* CONFIG_UART_STM32_PORT_10 */
#ifdef CONFIG_SOC_SERIES_STM32L4X
#ifdef CONFIG_UART_STM32_LPUART_1
STM32_UART_INIT(LPUART_1, STM32_CLOCK_BUS_APB1_2, LL_APB1_GRP2_PERIPH_LPUART1)
STM32_UART_INIT(LPUART_1)
#endif /* CONFIG_UART_STM32_LPUART_1 */
#endif /* CONFIG_SOC_SERIES_STM32L4X */