diff --git a/boards/nxp/frdm_mcxn947/board.c b/boards/nxp/frdm_mcxn947/board.c index c1384e6c183..40efcb3ab81 100644 --- a/boards/nxp/frdm_mcxn947/board.c +++ b/boards/nxp/frdm_mcxn947/board.c @@ -1,5 +1,5 @@ /* - * Copyright 2024 NXP + * Copyright 2024-2025 NXP * SPDX-License-Identifier: Apache-2.0 */ #include @@ -84,6 +84,19 @@ __ramfunc static void enable_cache64(void) } #endif +static void unsecure_gpio(GPIO_Type * base) +{ + /* Enables CPU1 to access GPIO registers + * Pins and interrupts can be configured in non-secure access + */ + base->PCNS = 0xFFFFFFFFU; + base->ICNS = GPIO_ICNS_NSE1_MASK | GPIO_ICNS_NSE0_MASK; + + /* Pins and interrupts can be configured in non-privilege access */ + base->PCNP = 0xFFFFFFFFU; + base->ICNP = GPIO_ICNP_NPE1_MASK | GPIO_ICNP_NPE0_MASK; +} + void board_early_init_hook(void) { power_mode_od(); @@ -183,22 +196,27 @@ void board_early_init_hook(void) #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio0)) CLOCK_EnableClock(kCLOCK_Gpio0); + unsecure_gpio(GPIO0); #endif #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio1)) CLOCK_EnableClock(kCLOCK_Gpio1); + unsecure_gpio(GPIO1); #endif #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio2)) CLOCK_EnableClock(kCLOCK_Gpio2); + unsecure_gpio(GPIO2); #endif #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio3)) CLOCK_EnableClock(kCLOCK_Gpio3); + unsecure_gpio(GPIO3); #endif #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio4)) CLOCK_EnableClock(kCLOCK_Gpio4); + unsecure_gpio(GPIO4); #endif #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(dac0))