From d6ba49e2989bbab356481fdcb9739aaec437be9b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andrzej=20G=C5=82=C4=85bek?= Date: Mon, 13 Feb 2023 14:36:31 +0100 Subject: [PATCH] drivers: nrf_rtc_timer: Rename set_absolute_alarm() to set_alarm() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This function name is misleading as the absolute time values handled by the driver are 64-bit and this function receives a 32-bit parameter, which is supposed to be a CC register value, not the target time. Correct the name of this function and its parameter, and remove a now unnecessary masking from its body. Signed-off-by: Andrzej Głąbek --- drivers/timer/nrf_rtc_timer.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/timer/nrf_rtc_timer.c b/drivers/timer/nrf_rtc_timer.c index a3fca64910e..cca97484d8b 100644 --- a/drivers/timer/nrf_rtc_timer.c +++ b/drivers/timer/nrf_rtc_timer.c @@ -217,7 +217,7 @@ uint64_t z_nrf_rtc_timer_get_ticks(k_timeout_t t) return curr_time + result; } -/** @brief Function safely sets absolute alarm. +/** @brief Function safely sets an alarm. * * It assumes that provided value is at most COUNTER_HALF_SPAN cycles from now * (other values are considered to be from the past). It detects late setting @@ -227,9 +227,9 @@ uint64_t z_nrf_rtc_timer_get_ticks(k_timeout_t t) * * @param[in] chan A channel for which a new CC value is to be set. * - * @param[in] abs_val An absolute value of CC register to be set. + * @param[in] req_cc Requested CC register value to be set. */ -static void set_absolute_alarm(int32_t chan, uint32_t abs_val) +static void set_alarm(int32_t chan, uint32_t req_cc) { /* Ensure that the value exposed in this driver API is consistent with * assumptions of this function. @@ -243,10 +243,10 @@ static void set_absolute_alarm(int32_t chan, uint32_t abs_val) * occurs in the second half of the RTC clock cycle (such situation can * be provoked by test_next_cycle_timeouts in the nrf_rtc_timer suite). * This never happens when the written value is N+3. Use 3 cycles as - * for the nearest scheduling then. + * the nearest possible scheduling then. */ enum { MIN_CYCLES_FROM_NOW = 3 }; - uint32_t cc_val = abs_val & COUNTER_MAX; + uint32_t cc_val = req_cc; uint32_t cc_inc = MIN_CYCLES_FROM_NOW; /* Disable event routing for the channel to avoid getting a COMPARE @@ -313,7 +313,7 @@ static int compare_set_nolocks(int32_t chan, uint64_t target_time, /* Target time is valid and is different than currently set. * Set CC value. */ - set_absolute_alarm(chan, cc_value); + set_alarm(chan, cc_value); } } else { /* Force ISR handling when exiting from critical section. */ @@ -478,11 +478,11 @@ static void process_channel(int32_t chan) cc_data[chan].callback = NULL; cc_data[chan].target_time = TARGET_TIME_INVALID; event_disable(chan); - /* Because of the way set_absolute_alarm() sets the CC - * register, it may turn out that another COMPARE event - * has been generated for the same alarm. Make sure the - * event is cleared, so that the ISR is not executed - * again unnecessarily. + /* Because of the way set_alarm() sets the CC register, + * it may turn out that another COMPARE event has been + * generated for the same alarm. Make sure the event + * is cleared, so that the ISR is not executed again + * unnecessarily. */ event_clear(chan); }