From d6990ff8d929e82aa68b8084e4347f79d05dcbbd Mon Sep 17 00:00:00 2001
From: Erwan Gouriou <erwan.gouriou@linaro.org>
Date: Wed, 5 Apr 2023 10:11:48 +0200
Subject: [PATCH] dts: stm32l4: Add a comment on RNG clock configuration

Explicit default RNG domain clock configuration constraints.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
---
 dts/arm/st/l4/stm32l4.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/dts/arm/st/l4/stm32l4.dtsi b/dts/arm/st/l4/stm32l4.dtsi
index b3079d2af5f..1a96c3914e8 100644
--- a/dts/arm/st/l4/stm32l4.dtsi
+++ b/dts/arm/st/l4/stm32l4.dtsi
@@ -448,6 +448,9 @@
 			reg = <0x50060800 0x400>;
 			interrupts = <80 0>;
 			clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00040000>,
+				/* Following domain clock setting requires MSI
+				 * clock to be enabled with msi-range = <11>;
+				 */
 				 <&rcc STM32_SRC_MSI CLK48_SEL(3)>;
 			status = "disabled";
 		};