include: arch: move addr_types to common location
All architectures declare those variables the same way, no need to define them per arch, instead put them in common. If someone deviates, they can create their own header. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
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9 changed files with 7 additions and 55 deletions
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@ -27,7 +27,7 @@
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#include <arch/arc/v2/aux_regs.h>
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#include <arch/arc/v2/aux_regs.h>
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#include <arch/arc/v2/arcv2_irq_unit.h>
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#include <arch/arc/v2/arcv2_irq_unit.h>
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#include <arch/arc/v2/asm_inline.h>
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#include <arch/arc/v2/asm_inline.h>
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#include <arch/arc/v2/addr_types.h>
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#include <arch/common/addr_types.h>
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#include "v2/sys_io.h"
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#include "v2/sys_io.h"
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#endif
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#endif
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@ -1,17 +0,0 @@
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/*
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* Copyright (c) 2015 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* @file ARC-v2 address types (virtual, physical, etc) definitions */
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#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_ADDR_TYPES_H_
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#define ZEPHYR_INCLUDE_ARCH_ARC_V2_ADDR_TYPES_H_
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#ifndef _ASMLANGUAGE
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typedef unsigned int paddr_t;
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typedef unsigned int vaddr_t;
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#endif
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#endif /* ZEPHYR_INCLUDE_ARCH_ARC_V2_ADDR_TYPES_H_ */
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@ -29,8 +29,8 @@
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#include <arch/arm/cortex_m/misc.h>
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#include <arch/arm/cortex_m/misc.h>
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#include <arch/arm/cortex_m/memory_map.h>
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#include <arch/arm/cortex_m/memory_map.h>
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#include <arch/arm/cortex_m/asm_inline.h>
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#include <arch/arm/cortex_m/asm_inline.h>
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#include <arch/arm/cortex_m/addr_types.h>
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#include <arch/common/sys_io.h>
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#include <arch/common/sys_io.h>
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#include <arch/common/addr_types.h>
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#include <arch/common/ffs.h>
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#include <arch/common/ffs.h>
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#include <arch/arm/cortex_m/nmi.h>
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#include <arch/arm/cortex_m/nmi.h>
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#endif
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#endif
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@ -1,17 +0,0 @@
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/*
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* Copyright (c) 2015 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* @file Cortex-M address types (virtual, physical, etc) definitions */
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#ifndef ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_ADDR_TYPES_H_
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#define ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_ADDR_TYPES_H_
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#ifndef _ASMLANGUAGE
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typedef unsigned int paddr_t;
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typedef unsigned int vaddr_t;
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#endif
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#endif /* ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_ADDR_TYPES_H_ */
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@ -9,7 +9,9 @@
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#ifndef ZEPHYR_INCLUDE_ARCH_X86_ADDR_TYPES_H_
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#ifndef ZEPHYR_INCLUDE_ARCH_X86_ADDR_TYPES_H_
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#define ZEPHYR_INCLUDE_ARCH_X86_ADDR_TYPES_H_
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#define ZEPHYR_INCLUDE_ARCH_X86_ADDR_TYPES_H_
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#ifndef _ASMLANGUAGE
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typedef unsigned int paddr_t;
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typedef unsigned int paddr_t;
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typedef unsigned int vaddr_t;
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typedef unsigned int vaddr_t;
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#endif
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#endif /* ZEPHYR_INCLUDE_ARCH_X86_ADDR_TYPES_H_ */
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#endif /* ZEPHYR_INCLUDE_ARCH_X86_ADDR_TYPES_H_ */
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@ -16,6 +16,7 @@
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#include <system.h>
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#include <system.h>
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#include <arch/nios2/asm_inline.h>
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#include <arch/nios2/asm_inline.h>
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#include <arch/common/addr_types.h>
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#include <generated_dts_board.h>
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#include <generated_dts_board.h>
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#include "nios2.h"
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#include "nios2.h"
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#include <arch/common/sys_io.h>
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#include <arch/common/sys_io.h>
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@ -39,9 +40,6 @@ extern "C" {
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#include <irq.h>
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#include <irq.h>
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#include <sw_isr_table.h>
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#include <sw_isr_table.h>
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/* physical/virtual address types required by the kernel */
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typedef unsigned int paddr_t;
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typedef unsigned int vaddr_t;
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/**
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/**
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* Configure a static interrupt.
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* Configure a static interrupt.
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@ -25,7 +25,7 @@
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#ifndef _ASMLANGUAGE
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#ifndef _ASMLANGUAGE
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#include <arch/x86/asm_inline.h>
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#include <arch/x86/asm_inline.h>
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#include <arch/x86/addr_types.h>
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#include <arch/common/addr_types.h>
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#include <arch/x86/segmentation.h>
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#include <arch/x86/segmentation.h>
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#endif
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#endif
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@ -1,15 +0,0 @@
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/*
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* Copyright (c) 2016 Cadence Design Systems, Inc.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_XTENSA_ADDR_TYPES_H_
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#define ZEPHYR_INCLUDE_ARCH_XTENSA_ADDR_TYPES_H_
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#ifndef _ASMLANGUAGE
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typedef unsigned int paddr_t;
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typedef unsigned int vaddr_t;
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#endif
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#endif /* ZEPHYR_INCLUDE_ARCH_XTENSA_ADDR_TYPES_H_ */
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@ -27,6 +27,7 @@ extern "C" {
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#include <sw_isr_table.h>
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#include <sw_isr_table.h>
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#include <arch/xtensa/xtensa_irq.h>
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#include <arch/xtensa/xtensa_irq.h>
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#include <xtensa/config/core.h>
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#include <xtensa/config/core.h>
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#include <arch/common/addr_types.h>
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#define STACK_ALIGN 16
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#define STACK_ALIGN 16
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