From d4d2b09cac2478a15877781439fcc3faf19101ca Mon Sep 17 00:00:00 2001 From: Duy Nguyen Date: Wed, 26 Feb 2025 09:19:00 +0700 Subject: [PATCH] soc: renesas: Add support for RX62N MCU The qemu-system-rx is based on RX62N, this commit added support for the RX62N SOC layer. MCU is using RXv1 core and system timer running at 6MHz Signed-off-by: Duy Nguyen --- dts/rx/renesas/rx-qemu.dtsi | 113 +++++++++++++++++++++++++ soc/renesas/rx/rx62n/CMakeLists.txt | 6 ++ soc/renesas/rx/rx62n/Kconfig | 8 ++ soc/renesas/rx/rx62n/Kconfig.defconfig | 9 ++ soc/renesas/rx/rx62n/Kconfig.soc | 20 +++++ soc/renesas/rx/rx62n/soc.h | 12 +++ soc/renesas/rx/soc.yml | 3 + 7 files changed, 171 insertions(+) create mode 100644 dts/rx/renesas/rx-qemu.dtsi create mode 100644 soc/renesas/rx/rx62n/CMakeLists.txt create mode 100644 soc/renesas/rx/rx62n/Kconfig create mode 100644 soc/renesas/rx/rx62n/Kconfig.defconfig create mode 100644 soc/renesas/rx/rx62n/Kconfig.soc create mode 100644 soc/renesas/rx/rx62n/soc.h diff --git a/dts/rx/renesas/rx-qemu.dtsi b/dts/rx/renesas/rx-qemu.dtsi new file mode 100644 index 00000000000..912c0c4cac2 --- /dev/null +++ b/dts/rx/renesas/rx-qemu.dtsi @@ -0,0 +1,113 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * common device tree elements of all (currently supported) RX MCUs + */ + +#include +#include +#include +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + compatible = "renesas,rx"; + device_type = "cpu"; + reg = <0>; + status = "okay"; + }; + }; /* cpus */ + + icu: interrupt-controller@87000 { + #interrupt-cells = <2>; + compatible = "renesas,rx-icu"; + interrupt-controller; + reg = <0x0087000 0xff>, + <0x0087200 0x1f>, + <0x0087300 0xff>, + <0x00872f0 0x02>; + reg-names = "IR", "IER", "IPR", "FIR"; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + interrupt-parent = <&icu>; + + sram0: memory@0 { + device_type = "memory"; + compatible = "mmio-sram"; + reg = <0x0 DT_SIZE_K(48)>; + }; + + flash-controller@7e0000 { + reg = <0x007e0000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + code_flash: flash@fff80000 { + compatible = "soc-nv-flash"; + reg = <0xfff80000 DT_SIZE_K(512)>; + }; + }; + + sci0: sci0@88240 { + compatible = "renesas,rx-sci"; + interrupts = <215 1>, <216 1>, <217 1>, <214 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + reg = <0x88240 0x08>; + status = "disabled"; + channel = <0>; + + uart { + compatible = "renesas,rx-uart-sci-qemu"; + status = "disabled"; + }; + }; + + cmt: timer@88000 { + compatible = "renesas,rx-timer-cmt-start-control"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x00088000 0x02>; + reg-names = "CMSTR0"; + status = "okay"; + + cmt0: timer@88002 { + compatible = "renesas,rx-timer-cmt"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x00088002 0x02>, + <0x00088004 0x02>, + <0x00088006 0x02>; + reg-names = "CMCR", "CMCNT", "CMCOR"; + interrupts = <28 1>; + interrupt-names = "cmi"; + status = "okay"; + }; + + cmt1: timer@88008 { + compatible = "renesas,rx-timer-cmt"; + reg = <0x00088008 0x02>, + <0x0008800A 0x02>, + <0x0008800C 0x02>; + reg-names = "CMCR", "CMCNT", "CMCOR"; + interrupts = <29 1>; + interrupt-names = "cmi"; + status = "okay"; + }; + }; + }; +}; diff --git a/soc/renesas/rx/rx62n/CMakeLists.txt b/soc/renesas/rx/rx62n/CMakeLists.txt new file mode 100644 index 00000000000..af117a0ca01 --- /dev/null +++ b/soc/renesas/rx/rx62n/CMakeLists.txt @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +zephyr_include_directories(.) + +set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/rx/linker.ld CACHE INTERNAL "") diff --git a/soc/renesas/rx/rx62n/Kconfig b/soc/renesas/rx/rx62n/Kconfig new file mode 100644 index 00000000000..a164da74914 --- /dev/null +++ b/soc/renesas/rx/rx62n/Kconfig @@ -0,0 +1,8 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_RX62N + select RX + select CPU_RXV1 + select XIP + select CLOCK_CONTROL diff --git a/soc/renesas/rx/rx62n/Kconfig.defconfig b/soc/renesas/rx/rx62n/Kconfig.defconfig new file mode 100644 index 00000000000..5cb5b9a77c3 --- /dev/null +++ b/soc/renesas/rx/rx62n/Kconfig.defconfig @@ -0,0 +1,9 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_RX62N + +config INITIALIZATION_STACK_SIZE + default 512 + +endif # SOC_SERIES_RX62N diff --git a/soc/renesas/rx/rx62n/Kconfig.soc b/soc/renesas/rx/rx62n/Kconfig.soc new file mode 100644 index 00000000000..8646bb660dd --- /dev/null +++ b/soc/renesas/rx/rx62n/Kconfig.soc @@ -0,0 +1,20 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_RX62N + bool + select SOC_FAMILY_RENESAS_RX + help + Renesas RX62N series + +config SOC_R5F562N8 + bool + select SOC_SERIES_RX62N + help + R5F562N8 + +config SOC_SERIES + default "rx62n" if SOC_SERIES_RX62N + +config SOC + default "r5f562n8" if SOC_R5F562N8 diff --git a/soc/renesas/rx/rx62n/soc.h b/soc/renesas/rx/rx62n/soc.h new file mode 100644 index 00000000000..c7db1f5288c --- /dev/null +++ b/soc/renesas/rx/rx62n/soc.h @@ -0,0 +1,12 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef __RX62N_SOC_H__ +#define __RX62N_SOC_H__ + +#include "reg_protection.h" + +#endif /* __RX62N_SOC_H__ */ diff --git a/soc/renesas/rx/soc.yml b/soc/renesas/rx/soc.yml index 594bb96db19..f5436c48357 100644 --- a/soc/renesas/rx/soc.yml +++ b/soc/renesas/rx/soc.yml @@ -4,3 +4,6 @@ family: - name: rx130 socs: - name: r5f513083xfb + - name: rx62n + socs: + - name: r5f562n8