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dts: drivers: Add DTS MBOX entry for NXP MCXN947

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This commit adds MBOX device tree entry for MCXN947.
Adds support for MCXN in NXP ipm and mbox drivers.

Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
This commit is contained in:
Tomas Galbicka 2024-11-26 08:45:22 +01:00 • committed by Benjamin Cabé
commit d4d180c216
5 changed files with 49 additions and 8 deletions
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11
soc/nxp/mcx/mcxn/Kconfig
View file

@ -7,9 +7,6 @@ config SOC_SERIES_MCXN
select ARM
select HAS_MCUX
select HAS_MCUX_FLEXCOMM
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_CORTEX_M_HAS_DWT
select SOC_RESET_HOOK
config SOC_MCXN947_CPU0
select CPU_CORTEX_M33
@ -17,8 +14,16 @@ config SOC_MCXN947_CPU0
select CPU_HAS_ARM_MPU
select CPU_HAS_FPU
select ARMV8_M_DSP
select SOC_RESET_HOOK
select ARM_TRUSTZONE_M
select HAS_MCUX_CACHE
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_CORTEX_M_HAS_DWT
config SOC_MCXN947_CPU1
select CPU_CORTEX_M33
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_CORTEX_M_HAS_DWT
config SOC_MCXN236
select CPU_CORTEX_M33

21
soc/nxp/mcx/mcxn/soc.c
View file

@ -38,3 +38,24 @@ void soc_reset_hook(void)
* Throw a build error if user is enabling SPI and UART/I2C on a Flexcomm node.
*/
DT_FOREACH_STATUS_OKAY(nxp_lpspi, FLEXCOMM_CHECK)
#if defined(CONFIG_SECOND_CORE_MCUX) && defined(CONFIG_SOC_MCXN947_CPU0)
/* This function is also called at deep sleep resume. */
static int second_core_boot(void)
{
/* Boot source for Core 1 from flash */
SYSCON->CPBOOT = ((uint32_t)(char *)DT_REG_ADDR(DT_CHOSEN(zephyr_code_cpu1_partition)) &
SYSCON_CPBOOT_CPBOOT_MASK);
uint32_t temp = SYSCON->CPUCTRL;
temp |= 0xc0c40000U;
SYSCON->CPUCTRL = temp | SYSCON_CPUCTRL_CPU1RSTEN_MASK | SYSCON_CPUCTRL_CPU1CLKEN_MASK;
SYSCON->CPUCTRL = (temp | SYSCON_CPUCTRL_CPU1CLKEN_MASK) & (~SYSCON_CPUCTRL_CPU1RSTEN_MASK);
return 0;
}
SYS_INIT(second_core_boot, PRE_KERNEL_2, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif