quark_se_ss: Remove enter_arc_state and use QMSI functions
This commit removes the local implementation of enter_arc_state, where the ARC is instructed to sleep, using instead the QMSI 1.4 functions. Change-Id: Id489ad53851be50fc5e50add698891fcfaef3abe Signed-off-by: Juan Solano <juanx.solano.menacho@intel.com>
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1 changed files with 3 additions and 23 deletions
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@ -39,38 +39,18 @@ static void _deep_sleep(enum power_states state)
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}
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#endif
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#define SLEEP_MODE_CORE_OFF (0x0)
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#define SLEEP_MODE_CORE_TIMERS_RTC_OFF (0x60)
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#define ENABLE_INTERRUPTS (BIT(4) | _ARC_V2_STATUS32_E(_ARC_V2_DEF_IRQ_LEVEL))
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#define ARC_SS1 (SLEEP_MODE_CORE_OFF | ENABLE_INTERRUPTS)
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#define ARC_SS2 (SLEEP_MODE_CORE_TIMERS_RTC_OFF | ENABLE_INTERRUPTS)
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/* QMSI does not set the interrupt enable bit in the sleep operand.
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* For the time being, implement this in Zephyr.
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* This will be removed once QMSI is fixed.
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*/
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static void enter_arc_state(int mode)
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{
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/* Enter SSx */
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__asm__ volatile("sleep %0"
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: /* No output operands. */
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: /* Input operands. */
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"r"(mode) : "memory", "cc");
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}
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void _sys_soc_set_power_state(enum power_states state)
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{
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switch (state) {
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case SYS_POWER_STATE_CPU_LPS:
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qm_ss_power_soc_lpss_enable();
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enter_arc_state(ARC_SS2);
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qm_ss_power_cpu_ss2();
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break;
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case SYS_POWER_STATE_CPU_LPS_1:
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enter_arc_state(ARC_SS2);
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qm_ss_power_cpu_ss2();
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break;
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case SYS_POWER_STATE_CPU_LPS_2:
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enter_arc_state(ARC_SS1);
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qm_ss_power_cpu_ss1(QM_SS_POWER_CPU_SS1_TIMER_ON);
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break;
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#if (defined(CONFIG_SYS_POWER_DEEP_SLEEP))
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case SYS_POWER_STATE_DEEP_SLEEP:
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