quark_se_ss: Remove enter_arc_state and use QMSI functions

This commit removes the local implementation of enter_arc_state, where
the ARC is instructed to sleep, using instead the QMSI 1.4 functions.

Change-Id: Id489ad53851be50fc5e50add698891fcfaef3abe
Signed-off-by: Juan Solano <juanx.solano.menacho@intel.com>
This commit is contained in:
Juan Solano 2017-02-07 13:08:14 +01:00 committed by Anas Nashif
commit d490573933

View file

@ -39,38 +39,18 @@ static void _deep_sleep(enum power_states state)
}
#endif
#define SLEEP_MODE_CORE_OFF (0x0)
#define SLEEP_MODE_CORE_TIMERS_RTC_OFF (0x60)
#define ENABLE_INTERRUPTS (BIT(4) | _ARC_V2_STATUS32_E(_ARC_V2_DEF_IRQ_LEVEL))
#define ARC_SS1 (SLEEP_MODE_CORE_OFF | ENABLE_INTERRUPTS)
#define ARC_SS2 (SLEEP_MODE_CORE_TIMERS_RTC_OFF | ENABLE_INTERRUPTS)
/* QMSI does not set the interrupt enable bit in the sleep operand.
* For the time being, implement this in Zephyr.
* This will be removed once QMSI is fixed.
*/
static void enter_arc_state(int mode)
{
/* Enter SSx */
__asm__ volatile("sleep %0"
: /* No output operands. */
: /* Input operands. */
"r"(mode) : "memory", "cc");
}
void _sys_soc_set_power_state(enum power_states state)
{
switch (state) {
case SYS_POWER_STATE_CPU_LPS:
qm_ss_power_soc_lpss_enable();
enter_arc_state(ARC_SS2);
qm_ss_power_cpu_ss2();
break;
case SYS_POWER_STATE_CPU_LPS_1:
enter_arc_state(ARC_SS2);
qm_ss_power_cpu_ss2();
break;
case SYS_POWER_STATE_CPU_LPS_2:
enter_arc_state(ARC_SS1);
qm_ss_power_cpu_ss1(QM_SS_POWER_CPU_SS1_TIMER_ON);
break;
#if (defined(CONFIG_SYS_POWER_DEEP_SLEEP))
case SYS_POWER_STATE_DEEP_SLEEP: