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drivers: pinctrl: Introduce support for SiWx91x

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This device is included on Silabs SiWx91x series. The current driver is
able to manage "High Power" and "Ultra Low Power" pins.

Co-authored-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
This commit is contained in:
Jérôme Pouiller 2025-01-29 21:35:04 +01:00 • committed by Benjamin Cabé
commit d413936fb1
8 changed files with 829 additions and 0 deletions
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36
soc/silabs/silabs_siwx91x/siwg917/pinctrl_soc.h Normal file
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/*
* Copyright (c) 2023 Antmicro
* Copyright (c) 2024 Silicon Laboratories, Inc.
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_SOC_SILABS_SIWG917_PINCTRL_SOC_H_
#define ZEPHYR_SOC_SILABS_SIWG917_PINCTRL_SOC_H_
#include <zephyr/types.h>
#include <zephyr/dt-bindings/pinctrl/silabs/siwx91x-pinctrl.h>
typedef struct pinctrl_soc_pin_t {
uint8_t port;
uint8_t pin;
uint8_t ulppin;
uint8_t mode;
uint8_t ulpmode;
uint8_t pad;
} pinctrl_soc_pin_t;
#define Z_PINCTRL_STATE_PIN_INIT(node, prop, idx) { \
.port = FIELD_GET(SIWX91X_PINCTRL_PORT_MASK, DT_PROP_BY_IDX(node, prop, idx)), \
.pin = FIELD_GET(SIWX91X_PINCTRL_PIN_MASK, DT_PROP_BY_IDX(node, prop, idx)), \
.ulppin = FIELD_GET(SIWX91X_PINCTRL_ULPPIN_MASK, DT_PROP_BY_IDX(node, prop, idx)), \
.mode = FIELD_GET(SIWX91X_PINCTRL_MODE_MASK, DT_PROP_BY_IDX(node, prop, idx)), \
.ulpmode = FIELD_GET(SIWX91X_PINCTRL_ULPMODE_MASK, DT_PROP_BY_IDX(node, prop, idx)), \
.pad = FIELD_GET(SIWX91X_PINCTRL_PAD_MASK, DT_PROP_BY_IDX(node, prop, idx)), \
},
#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) { \
DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), DT_FOREACH_PROP_ELEM, \
pinmux, Z_PINCTRL_STATE_PIN_INIT) \
}
#endif