diff --git a/drivers/clock_control/clock_stm32_ll_common.c b/drivers/clock_control/clock_stm32_ll_common.c
index 649dcf99431..f79b6a06f9c 100644
--- a/drivers/clock_control/clock_stm32_ll_common.c
+++ b/drivers/clock_control/clock_stm32_ll_common.c
@@ -486,18 +486,24 @@ int stm32_clock_control_init(const struct device *dev)
 	LL_RCC_MSI_Disable();
 
 #elif STM32_PLL_SRC_HSE
-	int hse_bypass;
 
+#ifndef CONFIG_SOC_SERIES_STM32WLX
+	int hse_bypass;
 	if (IS_ENABLED(STM32_HSE_BYPASS)) {
 		hse_bypass = LL_UTILS_HSEBYPASS_ON;
 	} else {
 		hse_bypass = LL_UTILS_HSEBYPASS_OFF;
 	}
+#else
+	if (IS_ENABLED(STM32_HSE_TCXO)) {
+		LL_RCC_HSE_EnableTcxo();
+	}
+	if (IS_ENABLED(STM32_HSE_DIV2)) {
+		LL_RCC_HSE_EnableDiv2();
+	}
+#endif
 
 	/* Switch to PLL with HSE as clock source */
-#ifdef CONFIG_SOC_SERIES_STM32WLX
-	LL_RCC_HSE_EnableTcxo();
-#endif
 	LL_PLL_ConfigSystemClock_HSE(
 #if !defined(CONFIG_SOC_SERIES_STM32WBX) && !defined(CONFIG_SOC_SERIES_STM32WLX)
 		CONFIG_CLOCK_STM32_HSE_CLOCK,
@@ -520,8 +526,14 @@ int stm32_clock_control_init(const struct device *dev)
 					       GET_CURRENT_FLASH_PRESCALER());
 
 	/* Calculate new SystemCoreClock variable based on HSE freq */
-	new_hclk_freq = __LL_RCC_CALC_HCLK_FREQ(CONFIG_CLOCK_STM32_HSE_CLOCK,
-						hclk_prescaler);
+	uint32_t hse_freq;
+	if (IS_ENABLED(STM32_HSE_DIV2)) {
+		hse_freq = CONFIG_CLOCK_STM32_HSE_CLOCK / 2;
+	} else {
+		hse_freq = CONFIG_CLOCK_STM32_HSE_CLOCK;
+	}
+	new_hclk_freq = __LL_RCC_CALC_HCLK_FREQ(hse_freq, hclk_prescaler);
+
 #if defined(CONFIG_SOC_SERIES_STM32WBX) || defined(CONFIG_SOC_SERIES_STM32WLX)
 	new_flash_freq = RCC_CALC_FLASH_FREQ(CONFIG_CLOCK_STM32_HSE_CLOCK,
 					       flash_prescaler);
@@ -542,18 +554,18 @@ int stm32_clock_control_init(const struct device *dev)
 
 	/* Enable HSE if not enabled */
 	if (LL_RCC_HSE_IsReady() != 1) {
+#ifdef CONFIG_SOC_SERIES_STM32WLX
+		if (IS_ENABLED(STM32_HSE_TCXO)) {
+			LL_RCC_HSE_EnableTcxo();
+		}
+#else
 		/* Check if need to enable HSE bypass feature or not */
 		if (IS_ENABLED(STM32_HSE_BYPASS)) {
-#ifdef CONFIG_SOC_SERIES_STM32WLX
-			LL_RCC_HSE_EnableTcxo();
-		} else {
-			LL_RCC_HSE_DisableTcxo();
-#else
 			LL_RCC_HSE_EnableBypass();
 		} else {
 			LL_RCC_HSE_DisableBypass();
-#endif
 		}
+#endif
 
 		/* Enable HSE */
 		LL_RCC_HSE_Enable();