ext: qmsi: disable tx empty interrupt at the end of rx transfer
Disable tx fifo empty interrupt at the completion of a receive transfer. If the API caller does not send "STOP" at the end of a receive transfer, unnecessary tx fifo empty interrupt will come one by one endlessly. Jira: ZEP-556 Change-Id: I311aba843e28685e8cca36733ac3f1e09b70d900 Signed-off-by: Baohong Liu <baohong.liu@intel.com>
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2 changed files with 4 additions and 2 deletions
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@ -163,7 +163,8 @@ static void qm_i2c_isr_handler(const qm_i2c_t i2c)
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* complete
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*/
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controller->ic_intr_mask &=
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~QM_I2C_IC_INTR_MASK_RX_FULL;
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~(QM_I2C_IC_INTR_MASK_RX_FULL |
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QM_I2C_IC_INTR_MASK_TX_EMPTY);
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if (transfer->stop) {
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controller_disable(i2c);
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@ -137,7 +137,8 @@ static void qm_ss_i2c_isr_handler(const qm_ss_i2c_t i2c)
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*/
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QM_SS_REG_AUX_NAND(
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(controller + QM_SS_I2C_INTR_MASK),
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QM_SS_I2C_INTR_MASK_RX_FULL);
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(QM_SS_I2C_INTR_MASK_RX_FULL |
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QM_SS_I2C_INTR_MASK_TX_EMPTY));
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if (i2c_transfer[i2c]->stop) {
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controller_disable(i2c);
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