boards: nrf54h20dk: Add common files for iron board variants
Define `ipc_conf_iron.dtsi` and `memory_map_iron.dtsi`. In the future, they will be merged with the base `ipc_conf.dtsi` and `memory_map.dtsi` respectively. For now, they are used to replace a few devicetree nodes when building for `nrf54h20dk/nrf54h20/*/iron` board targets. Additional changes are included: * The IPC configuration includes new "nordic,ironside-call" nodes. * The memory map includes an updated RAM20 layout. Its subregions are placed under the `/reserved-memory` node like before. * The memory map also includes an updated MRAM layout. Partitions are now placed under a plain "fixed-partitions" node. MCUboot-specific node labels are applied in `cpuapp.dts`. Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
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3 changed files with 152 additions and 36 deletions
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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* This file is to be merged with the original ipc_conf.dtsi in the future. */
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/ {
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ipc {
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/delete-node/ ipc-1-2;
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/delete-node/ ipc-1-3;
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cpusec_cpuapp_ipc: ipc-1-2 {
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compatible = "nordic,ironside-call";
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memory-region = <&cpusec_cpuapp_ipc_shm>;
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mboxes = <&cpusec_bellboard 12>,
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<&cpuapp_bellboard 0>;
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status = "disabled";
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};
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cpusec_cpurad_ipc: ipc-1-3 {
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compatible = "nordic,ironside-call";
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memory-region = <&cpusec_cpurad_ipc_shm>;
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mboxes = <&cpusec_bellboard 18>,
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<&cpurad_bellboard 0>;
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status = "disabled";
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};
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};
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};
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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* This file is to be merged with the original memory_map.dtsi in the future.
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* The following nodes will be replaced:
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*/
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/delete-node/ &cpuapp_cpusec_ipc_shm;
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/delete-node/ &cpuapp_cpusys_ipc_shm;
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/delete-node/ &cpurad_cpusec_ipc_shm;
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/delete-node/ &cpurad_cpusys_ipc_shm;
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/delete-node/ &cpusec_cpuapp_ipc_shm;
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/delete-node/ &cpusec_cpurad_ipc_shm;
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/delete-node/ &cpusys_cpuapp_ipc_shm;
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/delete-node/ &cpusys_cpurad_ipc_shm;
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/delete-node/ &cpuapp_rw_partitions;
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/delete-node/ &cpuapp_rx_partitions;
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/delete-node/ &cpurad_rx_partitions;
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/ {
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reserved-memory {
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cpuapp_cpusys_ipc_shm: memory@2f88f600 {
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reg = <0x2f88f600 0x80>;
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};
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cpusys_cpuapp_ipc_shm: memory@2f88f680 {
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reg = <0x2f88f680 0x80>;
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};
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cpurad_cpusys_ipc_shm: memory@2f88f700 {
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reg = <0x2f88f700 0x80>;
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};
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cpusys_cpurad_ipc_shm: memory@2f88f780 {
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reg = <0x2f88f780 0x80>;
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};
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cpusec_cpurad_ipc_shm: memory@2f88f800 {
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reg = <0x2f88f800 0x80>;
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};
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cpurad_ironside_se_event_report: memory@2f88f880 {
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reg = <0x2f88f880 0x100>;
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};
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cpurad_ironside_se_boot_report: memory@2f88f980 {
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reg = <0x2f88f980 0x200>;
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};
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cpusec_cpuapp_ipc_shm: memory@2f88fb80 {
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reg = <0x2f88fb80 0x80>;
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};
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cpuapp_ironside_se_event_report: memory@2f88fc00 {
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reg = <0x2f88fc00 0x100>;
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};
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cpuapp_ironside_se_boot_report: memory@2f88fd00 {
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reg = <0x2f88fd00 0x200>;
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};
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};
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};
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&mram1x {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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cpuapp_boot_partition: partition@2c000 {
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reg = <0x2c000 DT_SIZE_K(64)>;
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};
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cpuapp_slot0_partition: partition@3c000 {
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reg = <0x3c000 DT_SIZE_K(336)>;
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};
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cpurad_slot0_partition: partition@90000 {
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reg = <0x90000 DT_SIZE_K(336)>;
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};
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cpuppr_code_partition: partition@e4000 {
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reg = <0xe4000 DT_SIZE_K(64)>;
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};
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cpuflpr_code_partition: partition@f4000 {
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reg = <0xf4000 DT_SIZE_K(48)>;
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};
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cpuapp_slot1_partition: partition@100000 {
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reg = <0x100000 DT_SIZE_K(336)>;
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};
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cpurad_slot1_partition: partition@154000 {
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reg = <0x154000 DT_SIZE_K(336)>;
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};
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storage_partition: partition@1a8000 {
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reg = <0x1a8000 DT_SIZE_K(40)>;
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};
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};
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};
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@ -5,13 +5,10 @@
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*/
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#include "nrf54h20dk_nrf54h20_cpuapp.dts"
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#include "nrf54h20dk_nrf54h20-ipc_conf_iron.dtsi"
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#include "nrf54h20dk_nrf54h20-memory_map_iron.dtsi"
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/delete-node/&cpurad_rx_partitions;
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/delete-node/&cpuapp_rx_partitions;
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/* This is not yet an exhaustive memory map, and contain only a minimum required to boot
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* the application core.
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*/
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/delete-node/ &cpusec_cpurad_ipc;
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/ {
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chosen {
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};
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};
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&mram1x {
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cpuapp_rx_partitions: cpuapp-rx-partitions {
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compatible = "nordic,owned-partitions", "fixed-partitions";
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nordic,access = <NRF_OWNER_ID_APPLICATION NRF_PERM_RXS>;
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#address-cells = <1>;
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#size-cells = <1>;
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boot_partition: partition@2c000 {
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label = "mcuboot";
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reg = <0x2c000 DT_SIZE_K(64)>;
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};
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slot0_partition: partition@3c000 {
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label = "image-0";
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reg = <0x3c000 DT_SIZE_K(200)>;
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};
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slot1_partition: partition@6E000 {
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label = "image-1";
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reg = <0x6E000 DT_SIZE_K(200)>;
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};
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cpuppr_code_partition: partition@a4000 {
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reg = <0xa4000 DT_SIZE_K(64)>;
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};
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cpuflpr_code_partition: partition@b4000 {
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reg = <0xb4000 DT_SIZE_K(48)>;
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};
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};
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&cpusec_cpuapp_ipc {
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mbox-names = "tx", "rx";
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status = "okay";
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};
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boot_partition: &cpuapp_boot_partition {
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label = "mcuboot";
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};
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slot0_partition: &cpuapp_slot0_partition {
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label = "image-0";
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};
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slot1_partition: &cpuapp_slot1_partition {
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label = "image-1";
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};
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