boards: nrf54h20dk: Add common files for iron board variants

Define `ipc_conf_iron.dtsi` and `memory_map_iron.dtsi`. In the future,
they will be merged with the base `ipc_conf.dtsi` and `memory_map.dtsi`
respectively. For now, they are used to replace a few devicetree nodes
when building for `nrf54h20dk/nrf54h20/*/iron` board targets.

Additional changes are included:

  * The IPC configuration includes new "nordic,ironside-call" nodes.
  * The memory map includes an updated RAM20 layout. Its subregions are
    placed under the `/reserved-memory` node like before.
  * The memory map also includes an updated MRAM layout. Partitions are
    now placed under a plain "fixed-partitions" node. MCUboot-specific
    node labels are applied in `cpuapp.dts`.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
This commit is contained in:
Grzegorz Swiderski 2025-04-23 08:32:14 +02:00 committed by Benjamin Cabé
commit d3704516b7
3 changed files with 152 additions and 36 deletions

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@ -0,0 +1,30 @@
/*
* Copyright (c) 2025 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
/* This file is to be merged with the original ipc_conf.dtsi in the future. */
/ {
ipc {
/delete-node/ ipc-1-2;
/delete-node/ ipc-1-3;
cpusec_cpuapp_ipc: ipc-1-2 {
compatible = "nordic,ironside-call";
memory-region = <&cpusec_cpuapp_ipc_shm>;
mboxes = <&cpusec_bellboard 12>,
<&cpuapp_bellboard 0>;
status = "disabled";
};
cpusec_cpurad_ipc: ipc-1-3 {
compatible = "nordic,ironside-call";
memory-region = <&cpusec_cpurad_ipc_shm>;
mboxes = <&cpusec_bellboard 18>,
<&cpurad_bellboard 0>;
status = "disabled";
};
};
};

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@ -0,0 +1,104 @@
/*
* Copyright (c) 2025 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
/* This file is to be merged with the original memory_map.dtsi in the future.
* The following nodes will be replaced:
*/
/delete-node/ &cpuapp_cpusec_ipc_shm;
/delete-node/ &cpuapp_cpusys_ipc_shm;
/delete-node/ &cpurad_cpusec_ipc_shm;
/delete-node/ &cpurad_cpusys_ipc_shm;
/delete-node/ &cpusec_cpuapp_ipc_shm;
/delete-node/ &cpusec_cpurad_ipc_shm;
/delete-node/ &cpusys_cpuapp_ipc_shm;
/delete-node/ &cpusys_cpurad_ipc_shm;
/delete-node/ &cpuapp_rw_partitions;
/delete-node/ &cpuapp_rx_partitions;
/delete-node/ &cpurad_rx_partitions;
/ {
reserved-memory {
cpuapp_cpusys_ipc_shm: memory@2f88f600 {
reg = <0x2f88f600 0x80>;
};
cpusys_cpuapp_ipc_shm: memory@2f88f680 {
reg = <0x2f88f680 0x80>;
};
cpurad_cpusys_ipc_shm: memory@2f88f700 {
reg = <0x2f88f700 0x80>;
};
cpusys_cpurad_ipc_shm: memory@2f88f780 {
reg = <0x2f88f780 0x80>;
};
cpusec_cpurad_ipc_shm: memory@2f88f800 {
reg = <0x2f88f800 0x80>;
};
cpurad_ironside_se_event_report: memory@2f88f880 {
reg = <0x2f88f880 0x100>;
};
cpurad_ironside_se_boot_report: memory@2f88f980 {
reg = <0x2f88f980 0x200>;
};
cpusec_cpuapp_ipc_shm: memory@2f88fb80 {
reg = <0x2f88fb80 0x80>;
};
cpuapp_ironside_se_event_report: memory@2f88fc00 {
reg = <0x2f88fc00 0x100>;
};
cpuapp_ironside_se_boot_report: memory@2f88fd00 {
reg = <0x2f88fd00 0x200>;
};
};
};
&mram1x {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
cpuapp_boot_partition: partition@2c000 {
reg = <0x2c000 DT_SIZE_K(64)>;
};
cpuapp_slot0_partition: partition@3c000 {
reg = <0x3c000 DT_SIZE_K(336)>;
};
cpurad_slot0_partition: partition@90000 {
reg = <0x90000 DT_SIZE_K(336)>;
};
cpuppr_code_partition: partition@e4000 {
reg = <0xe4000 DT_SIZE_K(64)>;
};
cpuflpr_code_partition: partition@f4000 {
reg = <0xf4000 DT_SIZE_K(48)>;
};
cpuapp_slot1_partition: partition@100000 {
reg = <0x100000 DT_SIZE_K(336)>;
};
cpurad_slot1_partition: partition@154000 {
reg = <0x154000 DT_SIZE_K(336)>;
};
storage_partition: partition@1a8000 {
reg = <0x1a8000 DT_SIZE_K(40)>;
};
};
};

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@ -5,13 +5,10 @@
*/
#include "nrf54h20dk_nrf54h20_cpuapp.dts"
#include "nrf54h20dk_nrf54h20-ipc_conf_iron.dtsi"
#include "nrf54h20dk_nrf54h20-memory_map_iron.dtsi"
/delete-node/&cpurad_rx_partitions;
/delete-node/&cpuapp_rx_partitions;
/* This is not yet an exhaustive memory map, and contain only a minimum required to boot
* the application core.
*/
/delete-node/ &cpusec_cpurad_ipc;
/ {
chosen {
@ -20,34 +17,19 @@
};
};
&mram1x {
cpuapp_rx_partitions: cpuapp-rx-partitions {
compatible = "nordic,owned-partitions", "fixed-partitions";
nordic,access = <NRF_OWNER_ID_APPLICATION NRF_PERM_RXS>;
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@2c000 {
label = "mcuboot";
reg = <0x2c000 DT_SIZE_K(64)>;
};
slot0_partition: partition@3c000 {
label = "image-0";
reg = <0x3c000 DT_SIZE_K(200)>;
};
slot1_partition: partition@6E000 {
label = "image-1";
reg = <0x6E000 DT_SIZE_K(200)>;
};
cpuppr_code_partition: partition@a4000 {
reg = <0xa4000 DT_SIZE_K(64)>;
};
cpuflpr_code_partition: partition@b4000 {
reg = <0xb4000 DT_SIZE_K(48)>;
};
};
&cpusec_cpuapp_ipc {
mbox-names = "tx", "rx";
status = "okay";
};
boot_partition: &cpuapp_boot_partition {
label = "mcuboot";
};
slot0_partition: &cpuapp_slot0_partition {
label = "image-0";
};
slot1_partition: &cpuapp_slot1_partition {
label = "image-1";
};