drivers: spi: fix spi_dw interrupt mask

Found EMSDP board SPI-FLASH sample broke after adding DFSS
into spi_dw. Found wrong interrput mask resulting in false
interrupt enabled. Now fixed it to fit both DFSS and DW.

Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
This commit is contained in:
Siyuan Cheng 2023-05-24 15:04:56 +08:00 committed by Anas Nashif
commit d2e91c6b8f
2 changed files with 6 additions and 11 deletions

View file

@ -436,7 +436,7 @@ static int transceive(const struct device *dev,
/* Enable interrupts */ /* Enable interrupts */
reg_data = !rx_bufs ? reg_data = !rx_bufs ?
DW_SPI_IMR_UNMASK & DW_SPI_IMR_MASK_RX : DW_SPI_IMR_UNMASK & DW_SPI_IMR_MASK_RX :
DW_SPI_IMR_UNMASK & DW_SPI_IMR_MASK_TX; DW_SPI_IMR_UNMASK;
write_imr(info, reg_data); write_imr(info, reg_data);
spi_context_cs_control(&spi->ctx, true); spi_context_cs_control(&spi->ctx, true);

View file

@ -258,17 +258,12 @@ static int reg_test_bit(uint8_t bit, uint32_t addr, uint32_t off)
DW_SPI_IMR_TXOIM | \ DW_SPI_IMR_TXOIM | \
DW_SPI_IMR_RXUIM | \ DW_SPI_IMR_RXUIM | \
DW_SPI_IMR_RXOIM | \ DW_SPI_IMR_RXOIM | \
DW_SPI_IMR_RXFIM | \ DW_SPI_IMR_RXFIM)
DW_SPI_IMR_MSTIM) #define DW_SPI_IMR_MASK_TX (~(DW_SPI_IMR_TXEIM | \
#define DW_SPI_IMR_MASK_TX (~(DW_SPI_IMR_RXUIM | \ DW_SPI_IMR_TXOIM))
DW_SPI_IMR_TXOIM | \ #define DW_SPI_IMR_MASK_RX (~(DW_SPI_IMR_RXUIM | \
DW_SPI_IMR_RXOIM | \ DW_SPI_IMR_RXOIM | \
DW_SPI_IMR_MSTIM)) DW_SPI_IMR_RXFIM))
#define DW_SPI_IMR_MASK_RX (~(DW_SPI_IMR_TXEIM |\
DW_SPI_IMR_RXUIM | \
DW_SPI_IMR_TXOIM | \
DW_SPI_IMR_RXOIM | \
DW_SPI_IMR_MSTIM))
/* /*
* Including the right register definition file * Including the right register definition file