From d212e50eafcf10e2d18ffe0bd13862d940bf9de0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Manuel=20Arg=C3=BCelles?= Date: Wed, 20 Sep 2023 16:04:11 +0700 Subject: [PATCH] soc: nxp_s32: enable RTU.PIT timers for S32ZE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Each RTU includes one PIT instance that can be used by any of the cores. Signed-off-by: Manuel Argüelles --- dts/arm/nxp/nxp_s32z27x_rtu0_r52.dtsi | 9 +++++++++ dts/arm/nxp/nxp_s32z27x_rtu1_r52.dtsi | 9 +++++++++ soc/arm/nxp_s32/s32ze/Kconfig.series | 2 ++ west.yml | 2 +- 4 files changed, 21 insertions(+), 1 deletion(-) diff --git a/dts/arm/nxp/nxp_s32z27x_rtu0_r52.dtsi b/dts/arm/nxp/nxp_s32z27x_rtu0_r52.dtsi index bc8ff76a850..6d3b7da45d2 100644 --- a/dts/arm/nxp/nxp_s32z27x_rtu0_r52.dtsi +++ b/dts/arm/nxp/nxp_s32z27x_rtu0_r52.dtsi @@ -83,5 +83,14 @@ clocks = <&clock NXP_S32_FIRC_CLK>; status = "disabled"; }; + + pit0: pit@76150000 { + compatible = "nxp,kinetis-pit"; + reg = <0x76150000 0x10000>; + interrupts = ; + clocks = <&clock NXP_S32_P0_REG_INTF_CLK>; + max-load-value = <0x00ffffff>; + status = "disabled"; + }; }; }; diff --git a/dts/arm/nxp/nxp_s32z27x_rtu1_r52.dtsi b/dts/arm/nxp/nxp_s32z27x_rtu1_r52.dtsi index dd2e41d8464..ed3de4f2f16 100644 --- a/dts/arm/nxp/nxp_s32z27x_rtu1_r52.dtsi +++ b/dts/arm/nxp/nxp_s32z27x_rtu1_r52.dtsi @@ -83,5 +83,14 @@ clocks = <&clock NXP_S32_FIRC_CLK>; status = "disabled"; }; + + pit0: pit@76950000 { + compatible = "nxp,kinetis-pit"; + reg = <0x76950000 0x10000>; + interrupts = ; + clocks = <&clock NXP_S32_P1_REG_INTF_CLK>; + max-load-value = <0x00ffffff>; + status = "disabled"; + }; }; }; diff --git a/soc/arm/nxp_s32/s32ze/Kconfig.series b/soc/arm/nxp_s32/s32ze/Kconfig.series index ebeca180a1e..c1f2d3606ec 100644 --- a/soc/arm/nxp_s32/s32ze/Kconfig.series +++ b/soc/arm/nxp_s32/s32ze/Kconfig.series @@ -15,5 +15,7 @@ config SOC_SERIES_S32ZE_R52 select PLATFORM_SPECIFIC_INIT select SOC_FAMILY_NXP_S32 select CLOCK_CONTROL + select HAS_MCUX + select HAS_MCUX_PIT help Enable support for NXP S32Z/E MCUs family on Cortex-R52 cores. diff --git a/west.yml b/west.yml index 4f4f04482e8..4a86f7acb01 100644 --- a/west.yml +++ b/west.yml @@ -199,7 +199,7 @@ manifest: groups: - hal - name: hal_nxp - revision: 6d91c1727dadb170facc48f5370358a12ae36677 + revision: b4a37865355a6d55cdcdc087b934017212fb0f54 path: modules/hal/nxp groups: - hal