drivers: dma: drop DEV_DATA/DEV_CFG usage
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and dev->config instead. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas
Carles Cufí
parent
3b6201e23a
commit
d2118eb1bc
9 changed files with 102 additions and 118 deletions
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@ -35,9 +35,6 @@ LOG_MODULE_REGISTER(dma_dw);
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#define DW_CFG_LOW_DEF 0x0
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#define DEV_NAME(dev) ((dev)->name)
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#define DEV_DATA(dev) ((struct dw_dma_dev_data *const)(dev)->data)
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#define DEV_CFG(dev) \
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((const struct dw_dma_dev_cfg *const)(dev)->config)
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/* number of tries to wait for reset */
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#define DW_DMA_CFG_TRIES 10000
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@ -55,8 +52,8 @@ static ALWAYS_INLINE uint32_t dw_read(uint32_t dma_base, uint32_t reg)
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static void dw_dma_isr(const struct device *dev)
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{
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const struct dw_dma_dev_cfg *const dev_cfg = DEV_CFG(dev);
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struct dw_dma_dev_data *const dev_data = DEV_DATA(dev);
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const struct dw_dma_dev_cfg *const dev_cfg = dev->config;
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struct dw_dma_dev_data *const dev_data = dev->data;
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struct dma_chan_data *chan_data;
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uint32_t status_tfr = 0U;
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@ -118,8 +115,8 @@ static void dw_dma_isr(const struct device *dev)
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static int dw_dma_config(const struct device *dev, uint32_t channel,
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struct dma_config *cfg)
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{
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struct dw_dma_dev_data *const dev_data = DEV_DATA(dev);
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const struct dw_dma_dev_cfg *const dev_cfg = DEV_CFG(dev);
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struct dw_dma_dev_data *const dev_data = dev->data;
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const struct dw_dma_dev_cfg *const dev_cfg = dev->config;
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struct dma_chan_data *chan_data;
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struct dma_block_config *cfg_blocks;
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uint32_t m_size;
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@ -252,8 +249,8 @@ static int dw_dma_config(const struct device *dev, uint32_t channel,
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static int dw_dma_reload(const struct device *dev, uint32_t channel,
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uint32_t src, uint32_t dst, size_t size)
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{
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struct dw_dma_dev_data *const dev_data = DEV_DATA(dev);
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const struct dw_dma_dev_cfg *const dev_cfg = DEV_CFG(dev);
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struct dw_dma_dev_data *const dev_data = dev->data;
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const struct dw_dma_dev_cfg *const dev_cfg = dev->config;
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if (channel >= DW_MAX_CHAN) {
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return -EINVAL;
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@ -270,7 +267,7 @@ static int dw_dma_reload(const struct device *dev, uint32_t channel,
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static int dw_dma_transfer_start(const struct device *dev, uint32_t channel)
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{
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const struct dw_dma_dev_cfg *const dev_cfg = DEV_CFG(dev);
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const struct dw_dma_dev_cfg *const dev_cfg = dev->config;
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if (channel >= DW_MAX_CHAN) {
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return -EINVAL;
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@ -284,7 +281,7 @@ static int dw_dma_transfer_start(const struct device *dev, uint32_t channel)
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static int dw_dma_transfer_stop(const struct device *dev, uint32_t channel)
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{
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const struct dw_dma_dev_cfg *const dev_cfg = DEV_CFG(dev);
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const struct dw_dma_dev_cfg *const dev_cfg = dev->config;
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if (channel >= DW_MAX_CHAN) {
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return -EINVAL;
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@ -297,8 +294,8 @@ static int dw_dma_transfer_stop(const struct device *dev, uint32_t channel)
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static void dw_dma_setup(const struct device *dev)
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{
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const struct dw_dma_dev_cfg *const dev_cfg = DEV_CFG(dev);
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struct dw_dma_dev_data *const dev_data = DEV_DATA(dev);
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const struct dw_dma_dev_cfg *const dev_cfg = dev->config;
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struct dw_dma_dev_data *const dev_data = dev->data;
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struct dw_drv_plat_data *dp = dev_data->channel_data;
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int i;
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@ -340,7 +337,7 @@ found:
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static int dw_dma_init(const struct device *dev)
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{
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const struct dw_dma_dev_cfg *const dev_cfg = DEV_CFG(dev);
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const struct dw_dma_dev_cfg *const dev_cfg = dev->config;
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/* Disable all channels and Channel interrupts */
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dw_dma_setup(dev);
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@ -26,12 +26,6 @@ LOG_MODULE_REGISTER(dma_iproc_pax);
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#define PAX_DMA_DEV_NAME(dev) ((dev)->name)
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#define PAX_DMA_DEV_CFG(dev) \
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((struct dma_iproc_pax_cfg *)(dev)->config)
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#define PAX_DMA_DEV_DATA(dev) \
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((struct dma_iproc_pax_data *)(dev)->data)
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/* Driver runtime data for PAX DMA and RM */
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static struct dma_iproc_pax_data pax_dma_data;
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@ -429,7 +423,7 @@ err:
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static int poll_on_write_sync(const struct device *dev,
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struct dma_iproc_pax_ring_data *ring)
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{
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struct dma_iproc_pax_cfg *cfg = PAX_DMA_DEV_CFG(dev);
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struct dma_iproc_pax_cfg *cfg = dev->config;
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const struct device *pcidev;
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struct dma_iproc_pax_write_sync_data sync_rd, *recv, *sent;
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uint64_t pci_addr;
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@ -479,7 +473,7 @@ static int poll_on_write_sync(const struct device *dev,
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static int process_cmpl_event(const struct device *dev,
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enum ring_idx idx, uint32_t pl_len)
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{
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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uint32_t wr_offs, rd_offs, ret = 0;
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struct dma_iproc_pax_ring_data *ring = &(pd->ring[idx]);
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struct cmpl_pkt *c;
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@ -538,7 +532,7 @@ static int process_cmpl_event(const struct device *dev,
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static int peek_ring_cmpl(const struct device *dev,
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enum ring_idx idx, uint32_t pl_len)
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{
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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uint32_t wr_offs, rd_offs, timeout = PAX_DMA_MAX_POLL_WAIT;
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struct dma_iproc_pax_ring_data *ring = &(pd->ring[idx]);
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@ -569,7 +563,7 @@ static void rm_isr(void *arg)
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{
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uint32_t status, err_stat, idx;
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const struct device *dev = arg;
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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/* read and clear interrupt status */
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status = sys_read32(RM_COMM_REG(pd, RM_COMM_MSI_INTR_INTERRUPT_STATUS));
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@ -599,8 +593,8 @@ static void rm_isr(void *arg)
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static int dma_iproc_pax_init(const struct device *dev)
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{
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struct dma_iproc_pax_cfg *cfg = PAX_DMA_DEV_CFG(dev);
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_cfg *cfg = dev->config;
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struct dma_iproc_pax_data *pd = dev->data;
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int r;
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uintptr_t mem_aligned;
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@ -713,7 +707,7 @@ static void set_pkt_count(const struct device *dev,
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enum ring_idx idx,
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uint32_t pl_len)
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{
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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uint32_t val;
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/* program packet count for interrupt assertion */
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@ -729,7 +723,7 @@ static int wait_for_pkt_completion(const struct device *dev,
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enum ring_idx idx,
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uint32_t pl_len)
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{
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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struct dma_iproc_pax_ring_data *ring;
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ring = &(pd->ring[idx]);
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@ -749,8 +743,8 @@ static int dma_iproc_pax_do_xfer(const struct device *dev,
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struct dma_iproc_pax_payload *pl,
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uint32_t pl_len)
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{
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_cfg *cfg = PAX_DMA_DEV_CFG(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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struct dma_iproc_pax_cfg *cfg = dev->config;
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int ret = 0, cnt;
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struct dma_iproc_pax_ring_data *ring;
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void *hdr;
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@ -854,7 +848,7 @@ err_ret:
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static int dma_iproc_pax_configure(const struct device *dev, uint32_t channel,
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struct dma_config *cfg)
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{
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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struct dma_iproc_pax_ring_data *ring;
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uint32_t xfer_sz;
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int ret = 0;
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@ -953,7 +947,7 @@ static int dma_iproc_pax_transfer_start(const struct device *dev,
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uint32_t channel)
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{
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int ret = 0;
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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struct dma_iproc_pax_ring_data *ring;
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if (channel >= PAX_DMA_RINGS_MAX) {
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@ -26,12 +26,6 @@ LOG_MODULE_REGISTER(dma_iproc_pax_v2);
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#define PAX_DMA_DEV_NAME(dev) ((dev)->name)
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#define PAX_DMA_DEV_CFG(dev) \
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((struct dma_iproc_pax_cfg *)(dev)->config)
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#define PAX_DMA_DEV_DATA(dev) \
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((struct dma_iproc_pax_data *)(dev)->data)
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/* Driver runtime data for PAX DMA and RM */
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static struct dma_iproc_pax_data pax_dma_data;
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@ -512,7 +506,7 @@ err:
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static int poll_on_write_sync(const struct device *dev,
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struct dma_iproc_pax_ring_data *ring)
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{
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struct dma_iproc_pax_cfg *cfg = PAX_DMA_DEV_CFG(dev);
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struct dma_iproc_pax_cfg *cfg = dev->config;
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const struct device *pcidev;
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struct dma_iproc_pax_write_sync_data sync_rd, *recv, *sent;
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uint64_t pci_addr;
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@ -563,7 +557,7 @@ static int poll_on_write_sync(const struct device *dev,
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static int process_cmpl_event(const struct device *dev,
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enum ring_idx idx, uint32_t pl_len)
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{
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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uint32_t wr_offs, rd_offs, ret = 0;
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struct dma_iproc_pax_ring_data *ring = &(pd->ring[idx]);
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struct cmpl_pkt *c;
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@ -625,7 +619,7 @@ static int process_cmpl_event(const struct device *dev,
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static int peek_ring_cmpl(const struct device *dev,
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enum ring_idx idx, uint32_t pl_len)
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{
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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uint32_t wr_offs, rd_offs, timeout = PAX_DMA_MAX_POLL_WAIT;
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struct dma_iproc_pax_ring_data *ring = &(pd->ring[idx]);
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@ -656,7 +650,7 @@ static void rm_isr(void *arg)
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{
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uint32_t status, err_stat, idx;
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const struct device *dev = arg;
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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err_stat =
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sys_read32(RM_COMM_REG(pd,
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@ -682,8 +676,8 @@ static void rm_isr(void *arg)
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static int dma_iproc_pax_init(const struct device *dev)
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{
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struct dma_iproc_pax_cfg *cfg = PAX_DMA_DEV_CFG(dev);
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_cfg *cfg = dev->config;
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struct dma_iproc_pax_data *pd = dev->data;
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int r;
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uintptr_t mem_aligned;
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@ -891,7 +885,7 @@ static void set_pkt_count(const struct device *dev,
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enum ring_idx idx,
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uint32_t pl_len)
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{
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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uint32_t val;
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/* program packet count for interrupt assertion */
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@ -907,7 +901,7 @@ static int wait_for_pkt_completion(const struct device *dev,
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enum ring_idx idx,
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uint32_t pl_len)
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{
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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struct dma_iproc_pax_ring_data *ring;
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ring = &(pd->ring[idx]);
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@ -925,8 +919,8 @@ static int dma_iproc_pax_process_dma_blocks(const struct device *dev,
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enum ring_idx idx,
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struct dma_config *config)
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{
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_cfg *cfg = PAX_DMA_DEV_CFG(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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struct dma_iproc_pax_cfg *cfg = dev->config;
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int ret = 0;
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struct dma_iproc_pax_ring_data *ring;
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uint32_t toggle_bit, non_hdr_bd_count = 0;
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@ -1003,7 +997,7 @@ err:
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static int dma_iproc_pax_configure(const struct device *dev, uint32_t channel,
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struct dma_config *cfg)
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{
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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struct dma_iproc_pax_ring_data *ring;
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int ret = 0;
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@ -1046,7 +1040,7 @@ static int dma_iproc_pax_transfer_start(const struct device *dev,
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uint32_t channel)
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{
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int ret = 0;
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struct dma_iproc_pax_data *pd = PAX_DMA_DEV_DATA(dev);
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struct dma_iproc_pax_data *pd = dev->data;
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struct dma_iproc_pax_ring_data *ring;
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if (channel >= PAX_DMA_RINGS_MAX) {
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@ -53,15 +53,14 @@ struct dma_mcux_edma_data {
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struct k_mutex dma_mutex;
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};
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#define DEV_CFG(dev) \
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((const struct dma_mcux_edma_config *const)dev->config)
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#define DEV_DATA(dev) ((struct dma_mcux_edma_data *)dev->data)
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#define DEV_BASE(dev) ((DMA_Type *)DEV_CFG(dev)->base)
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#define DEV_BASE(dev) \
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((DMA_Type *)((const struct dma_mcux_edma_config *const)dev->config)->base)
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#define DEV_DMAMUX_BASE(dev) ((DMAMUX_Type *)DEV_CFG(dev)->dmamux_base)
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#define DEV_DMAMUX_BASE(dev) \
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((DMAMUX_Type *)((const struct dma_mcux_edma_config *const)dev->config)->dmamux_base)
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#define DEV_CHANNEL_DATA(dev, ch) \
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((struct call_back *)(&(DEV_DATA(dev)->data_cb[ch])))
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((struct call_back *)(&(((struct dma_mcux_edma_data *)dev->data)->data_cb[ch])))
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#define DEV_EDMA_HANDLE(dev, ch) \
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((edma_handle_t *)(&(DEV_CHANNEL_DATA(dev, ch)->edma_handle)))
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@ -349,7 +348,7 @@ static int dma_mcux_edma_start(const struct device *dev, uint32_t channel)
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static int dma_mcux_edma_stop(const struct device *dev, uint32_t channel)
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{
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struct dma_mcux_edma_data *data = DEV_DATA(dev);
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struct dma_mcux_edma_data *data = dev->data;
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if (!data->data_cb[channel].busy) {
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return 0;
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@ -450,19 +449,22 @@ static const struct dma_driver_api dma_mcux_edma_api = {
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static int dma_mcux_edma_init(const struct device *dev)
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{
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const struct dma_mcux_edma_config *config = dev->config;
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struct dma_mcux_edma_data *data = dev->data;
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edma_config_t userConfig = { 0 };
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LOG_DBG("INIT NXP EDMA");
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DMAMUX_Init(DEV_DMAMUX_BASE(dev));
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EDMA_GetDefaultConfig(&userConfig);
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EDMA_Init(DEV_BASE(dev), &userConfig);
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DEV_CFG(dev)->irq_config_func(dev);
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memset(DEV_DATA(dev), 0, sizeof(struct dma_mcux_edma_data));
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config->irq_config_func(dev);
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memset(dev->data, 0, sizeof(struct dma_mcux_edma_data));
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memset(tcdpool, 0, sizeof(tcdpool));
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k_mutex_init(&DEV_DATA(dev)->dma_mutex);
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DEV_DATA(dev)->dma_ctx.magic = DMA_MAGIC;
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DEV_DATA(dev)->dma_ctx.dma_channels = DEV_CFG(dev)->dma_channels;
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DEV_DATA(dev)->dma_ctx.atomic = DEV_DATA(dev)->channels_atomic;
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k_mutex_init(&data->dma_mutex);
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data->dma_ctx.magic = DMA_MAGIC;
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data->dma_ctx.dma_channels = config->dma_channels;
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data->dma_ctx.atomic = data->channels_atomic;
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return 0;
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}
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||||
|
||||
|
|
|
|||
|
|
@ -45,13 +45,11 @@ struct dma_mcux_lpc_dma_data {
|
|||
uint32_t num_channels_used;
|
||||
};
|
||||
|
||||
#define DEV_CFG(dev) \
|
||||
((const struct dma_mcux_lpc_config *const)(dev)->config)
|
||||
#define DEV_DATA(dev) ((struct dma_mcux_lpc_dma_data *)dev->data)
|
||||
#define DEV_BASE(dev) ((DMA_Type *)DEV_CFG(dev)->base)
|
||||
#define DEV_BASE(dev) \
|
||||
((DMA_Type *)((const struct dma_mcux_lpc_config *const)(dev)->config)->base)
|
||||
|
||||
#define DEV_CHANNEL_DATA(dev, ch) \
|
||||
((struct call_back *)(&(DEV_DATA(dev)->data_cb[ch])))
|
||||
((struct call_back *)(&(((struct dma_mcux_lpc_dma_data *)dev->data)->data_cb[ch])))
|
||||
|
||||
#define DEV_DMA_HANDLE(dev, ch) \
|
||||
((dma_handle_t *)(&(DEV_CHANNEL_DATA(dev, ch)->dma_handle)))
|
||||
|
|
@ -92,10 +90,11 @@ static void dma_mcux_lpc_irq_handler(const struct device *dev)
|
|||
static int dma_mcux_lpc_configure(const struct device *dev, uint32_t channel,
|
||||
struct dma_config *config)
|
||||
{
|
||||
const struct dma_mcux_lpc_config *dev_config = dev->config;
|
||||
dma_handle_t *p_handle;
|
||||
uint32_t xferConfig = 0U;
|
||||
struct call_back *data;
|
||||
struct dma_mcux_lpc_dma_data *dma_data = DEV_DATA(dev);
|
||||
struct dma_mcux_lpc_dma_data *dma_data = dev->data;
|
||||
struct dma_block_config *block_config = config->head_block;
|
||||
uint32_t virtual_channel;
|
||||
uint32_t total_dma_channels;
|
||||
|
|
@ -107,7 +106,7 @@ static int dma_mcux_lpc_configure(const struct device *dev, uint32_t channel,
|
|||
}
|
||||
|
||||
/* Check if have a free slot to store DMA channel data */
|
||||
if (dma_data->num_channels_used > DEV_CFG(dev)->num_of_channels) {
|
||||
if (dma_data->num_channels_used > dev_config->num_of_channels) {
|
||||
LOG_ERR("out of DMA channel %d", channel);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
|
@ -347,7 +346,8 @@ static int dma_mcux_lpc_configure(const struct device *dev, uint32_t channel,
|
|||
|
||||
static int dma_mcux_lpc_start(const struct device *dev, uint32_t channel)
|
||||
{
|
||||
uint32_t virtual_channel = DEV_DATA(dev)->channel_index[channel];
|
||||
struct dma_mcux_lpc_dma_data *data = dev->data;
|
||||
uint32_t virtual_channel = data->channel_index[channel];
|
||||
struct call_back *data = DEV_CHANNEL_DATA(dev, virtual_channel);
|
||||
|
||||
LOG_DBG("START TRANSFER");
|
||||
|
|
@ -359,7 +359,8 @@ static int dma_mcux_lpc_start(const struct device *dev, uint32_t channel)
|
|||
|
||||
static int dma_mcux_lpc_stop(const struct device *dev, uint32_t channel)
|
||||
{
|
||||
uint32_t virtual_channel = DEV_DATA(dev)->channel_index[channel];
|
||||
struct dma_mcux_lpc_dma_data *data = dev->data;
|
||||
uint32_t virtual_channel = data->channel_index[channel];
|
||||
struct call_back *data = DEV_CHANNEL_DATA(dev, virtual_channel);
|
||||
|
||||
if (!data->busy) {
|
||||
|
|
@ -378,7 +379,8 @@ static int dma_mcux_lpc_stop(const struct device *dev, uint32_t channel)
|
|||
static int dma_mcux_lpc_reload(const struct device *dev, uint32_t channel,
|
||||
uint32_t src, uint32_t dst, size_t size)
|
||||
{
|
||||
uint32_t virtual_channel = DEV_DATA(dev)->channel_index[channel];
|
||||
struct dma_mcux_lpc_dma_data *data = dev->data;
|
||||
uint32_t virtual_channel = data->channel_index[channel];
|
||||
struct call_back *data = DEV_CHANNEL_DATA(dev, virtual_channel);
|
||||
uint8_t src_inc, dst_inc;
|
||||
uint32_t xferConfig = 0U;
|
||||
|
|
@ -453,7 +455,8 @@ static int dma_mcux_lpc_reload(const struct device *dev, uint32_t channel,
|
|||
static int dma_mcux_lpc_get_status(const struct device *dev, uint32_t channel,
|
||||
struct dma_status *status)
|
||||
{
|
||||
uint32_t virtual_channel = DEV_DATA(dev)->channel_index[channel];
|
||||
struct dma_mcux_lpc_dma_data *data = dev->data;
|
||||
uint32_t virtual_channel = data->channel_index[channel];
|
||||
struct call_back *data = DEV_CHANNEL_DATA(dev, virtual_channel);
|
||||
|
||||
if (data->busy) {
|
||||
|
|
@ -472,13 +475,14 @@ static int dma_mcux_lpc_get_status(const struct device *dev, uint32_t channel,
|
|||
|
||||
static int dma_mcux_lpc_init(const struct device *dev)
|
||||
{
|
||||
struct dma_mcux_lpc_dma_data *data = DEV_DATA(dev);
|
||||
const struct dma_mcux_lpc_config *config = dev->config;
|
||||
struct dma_mcux_lpc_dma_data *data = dev->data;
|
||||
int size_channel_data;
|
||||
int total_dma_channels;
|
||||
|
||||
/* Array to store DMA channel data */
|
||||
size_channel_data =
|
||||
sizeof(struct call_back) * DEV_CFG(dev)->num_of_channels;
|
||||
sizeof(struct call_back) * config->num_of_channels;
|
||||
data->data_cb = k_malloc(size_channel_data);
|
||||
if (!data->data_cb) {
|
||||
LOG_ERR("HEAP_MEM_POOL_SIZE is too small");
|
||||
|
|
|
|||
|
|
@ -33,13 +33,11 @@ struct nios2_msgdma_dev_cfg {
|
|||
};
|
||||
|
||||
#define DEV_NAME(dev) ((dev)->name)
|
||||
#define DEV_CFG(dev) \
|
||||
((struct nios2_msgdma_dev_cfg *)(dev)->config)
|
||||
|
||||
static void nios2_msgdma_isr(void *arg)
|
||||
{
|
||||
const struct device *dev = (const struct device *)arg;
|
||||
struct nios2_msgdma_dev_cfg *cfg = DEV_CFG(dev);
|
||||
struct nios2_msgdma_dev_cfg *cfg = (struct nios2_msgdma_dev_cfg *)dev->config;
|
||||
|
||||
/* Call Altera HAL driver ISR */
|
||||
alt_handle_irq(cfg->msgdma_dev, DT_INST_IRQN(0));
|
||||
|
|
@ -70,7 +68,7 @@ static void nios2_msgdma_callback(void *context)
|
|||
static int nios2_msgdma_config(const struct device *dev, uint32_t channel,
|
||||
struct dma_config *cfg)
|
||||
{
|
||||
struct nios2_msgdma_dev_cfg *dev_cfg = DEV_CFG(dev);
|
||||
struct nios2_msgdma_dev_cfg *dev_cfg = (struct nios2_msgdma_dev_cfg *)dev->config;
|
||||
struct dma_block_config *dma_block;
|
||||
int status;
|
||||
uint32_t control;
|
||||
|
|
@ -155,7 +153,7 @@ static int nios2_msgdma_config(const struct device *dev, uint32_t channel,
|
|||
static int nios2_msgdma_transfer_start(const struct device *dev,
|
||||
uint32_t channel)
|
||||
{
|
||||
struct nios2_msgdma_dev_cfg *cfg = DEV_CFG(dev);
|
||||
struct nios2_msgdma_dev_cfg *cfg = (struct nios2_msgdma_dev_cfg *)dev->config;
|
||||
int status;
|
||||
|
||||
/* Nios-II mSGDMA supports only one channel per DMA core */
|
||||
|
|
@ -179,7 +177,7 @@ static int nios2_msgdma_transfer_start(const struct device *dev,
|
|||
static int nios2_msgdma_transfer_stop(const struct device *dev,
|
||||
uint32_t channel)
|
||||
{
|
||||
struct nios2_msgdma_dev_cfg *cfg = DEV_CFG(dev);
|
||||
struct nios2_msgdma_dev_cfg *cfg = (struct nios2_msgdma_dev_cfg *)dev->config;
|
||||
int ret = -EIO;
|
||||
uint32_t status;
|
||||
|
||||
|
|
@ -209,7 +207,7 @@ static const struct dma_driver_api nios2_msgdma_driver_api = {
|
|||
|
||||
static int nios2_msgdma0_initialize(const struct device *dev)
|
||||
{
|
||||
struct nios2_msgdma_dev_cfg *dev_cfg = DEV_CFG(dev);
|
||||
struct nios2_msgdma_dev_cfg *dev_cfg = (struct nios2_msgdma_dev_cfg *)dev->config;
|
||||
|
||||
dev_cfg->dev = dev;
|
||||
|
||||
|
|
|
|||
|
|
@ -18,11 +18,6 @@
|
|||
LOG_MODULE_REGISTER(dma_pl330);
|
||||
|
||||
#define DEV_NAME(dev) ((dev)->name)
|
||||
#define DEV_CFG(dev) \
|
||||
((const struct dma_pl330_config *const)(dev)->config)
|
||||
|
||||
#define DEV_DATA(dev) \
|
||||
((struct dma_pl330_dev_data *const)(dev)->data)
|
||||
|
||||
#define BYTE_WIDTH(burst_size) (1 << (burst_size))
|
||||
|
||||
|
|
@ -171,7 +166,7 @@ static int dma_pl330_setup_ch(const struct device *dev,
|
|||
uint32_t loop_counter0 = 0, loop_counter1 = 0;
|
||||
uint32_t srcbytewidth, dstbytewidth;
|
||||
uint32_t loop_counter, residue;
|
||||
struct dma_pl330_dev_data *const dev_data = DEV_DATA(dev);
|
||||
struct dma_pl330_dev_data *const dev_data = dev->data;
|
||||
struct dma_pl330_ch_config *channel_cfg;
|
||||
int secure = ch_dat->nonsec_mode ? SRC_PRI_NONSEC_VALUE :
|
||||
SRC_PRI_SEC_VALUE;
|
||||
|
|
@ -268,7 +263,7 @@ static int dma_pl330_setup_ch(const struct device *dev,
|
|||
static int dma_pl330_start_dma_ch(const struct device *dev,
|
||||
uint32_t reg_base, int ch, int secure)
|
||||
{
|
||||
struct dma_pl330_dev_data *const dev_data = DEV_DATA(dev);
|
||||
struct dma_pl330_dev_data *const dev_data = dev->data;
|
||||
struct dma_pl330_ch_config *channel_cfg;
|
||||
uint32_t count = 0U;
|
||||
uint32_t data;
|
||||
|
|
@ -323,8 +318,8 @@ static int dma_pl330_xfer(const struct device *dev, uint64_t dst,
|
|||
uint64_t src, uint32_t size, uint32_t channel,
|
||||
uint32_t *xfer_size)
|
||||
{
|
||||
struct dma_pl330_dev_data *const dev_data = DEV_DATA(dev);
|
||||
const struct dma_pl330_config *const dev_cfg = DEV_CFG(dev);
|
||||
struct dma_pl330_dev_data *const dev_data = dev->data;
|
||||
const struct dma_pl330_config *const dev_cfg = dev->config;
|
||||
struct dma_pl330_ch_config *channel_cfg;
|
||||
struct dma_pl330_ch_internal *ch_handle;
|
||||
int ret;
|
||||
|
|
@ -471,7 +466,7 @@ static int dma_pl330_submit(const struct device *dev, uint64_t dst,
|
|||
static int dma_pl330_configure(const struct device *dev, uint32_t channel,
|
||||
struct dma_config *cfg)
|
||||
{
|
||||
struct dma_pl330_dev_data *const dev_data = DEV_DATA(dev);
|
||||
struct dma_pl330_dev_data *const dev_data = dev->data;
|
||||
struct dma_pl330_ch_config *channel_cfg;
|
||||
struct dma_pl330_ch_internal *ch_handle;
|
||||
|
||||
|
|
@ -525,7 +520,7 @@ static int dma_pl330_configure(const struct device *dev, uint32_t channel,
|
|||
static int dma_pl330_transfer_start(const struct device *dev,
|
||||
uint32_t channel)
|
||||
{
|
||||
struct dma_pl330_dev_data *const dev_data = DEV_DATA(dev);
|
||||
struct dma_pl330_dev_data *const dev_data = dev->data;
|
||||
struct dma_pl330_ch_config *channel_cfg;
|
||||
int ret;
|
||||
|
||||
|
|
@ -557,8 +552,8 @@ static int dma_pl330_transfer_stop(const struct device *dev, uint32_t channel)
|
|||
|
||||
static int dma_pl330_initialize(const struct device *dev)
|
||||
{
|
||||
const struct dma_pl330_config *const dev_cfg = DEV_CFG(dev);
|
||||
struct dma_pl330_dev_data *const dev_data = DEV_DATA(dev);
|
||||
const struct dma_pl330_config *const dev_cfg = dev->config;
|
||||
struct dma_pl330_dev_data *const dev_data = dev->data;
|
||||
struct dma_pl330_ch_config *channel_cfg;
|
||||
|
||||
for (int channel = 0; channel < MAX_DMA_CHANNELS; channel++) {
|
||||
|
|
|
|||
|
|
@ -26,14 +26,10 @@ struct dma_sam0_data {
|
|||
struct dma_sam0_channel channels[DMAC_CH_NUM];
|
||||
};
|
||||
|
||||
#define DEV_DATA(dev) \
|
||||
((struct dma_sam0_data *const)(dev)->data)
|
||||
|
||||
|
||||
/* Handles DMA interrupts and dispatches to the individual channel */
|
||||
static void dma_sam0_isr(const struct device *dev)
|
||||
{
|
||||
struct dma_sam0_data *data = DEV_DATA(dev);
|
||||
struct dma_sam0_data *data = dev->data;
|
||||
struct dma_sam0_channel *chdata;
|
||||
uint16_t pend = DMA_REGS->INTPEND.reg;
|
||||
uint32_t channel;
|
||||
|
|
@ -65,7 +61,7 @@ static void dma_sam0_isr(const struct device *dev)
|
|||
static int dma_sam0_config(const struct device *dev, uint32_t channel,
|
||||
struct dma_config *config)
|
||||
{
|
||||
struct dma_sam0_data *data = DEV_DATA(dev);
|
||||
struct dma_sam0_data *data = dev->data;
|
||||
DmacDescriptor *desc = &data->descriptors[channel];
|
||||
struct dma_block_config *block = config->head_block;
|
||||
struct dma_sam0_channel *channel_control;
|
||||
|
|
@ -318,7 +314,7 @@ static int dma_sam0_stop(const struct device *dev, uint32_t channel)
|
|||
static int dma_sam0_reload(const struct device *dev, uint32_t channel,
|
||||
uint32_t src, uint32_t dst, size_t size)
|
||||
{
|
||||
struct dma_sam0_data *data = DEV_DATA(dev);
|
||||
struct dma_sam0_data *data = dev->data;
|
||||
DmacDescriptor *desc = &data->descriptors[channel];
|
||||
int key = irq_lock();
|
||||
|
||||
|
|
@ -362,7 +358,7 @@ inval:
|
|||
static int dma_sam0_get_status(const struct device *dev, uint32_t channel,
|
||||
struct dma_status *stat)
|
||||
{
|
||||
struct dma_sam0_data *data = DEV_DATA(dev);
|
||||
struct dma_sam0_data *data = dev->data;
|
||||
uint32_t act;
|
||||
|
||||
if (channel >= DMAC_CH_NUM || stat == NULL) {
|
||||
|
|
@ -406,7 +402,7 @@ static int dma_sam0_get_status(const struct device *dev, uint32_t channel,
|
|||
|
||||
static int dma_sam0_init(const struct device *dev)
|
||||
{
|
||||
struct dma_sam0_data *data = DEV_DATA(dev);
|
||||
struct dma_sam0_data *data = dev->data;
|
||||
|
||||
/* Enable clocks. */
|
||||
#ifdef MCLK
|
||||
|
|
|
|||
|
|
@ -47,15 +47,12 @@ struct sam_xdmac_dev_data {
|
|||
};
|
||||
|
||||
#define DEV_NAME(dev) ((dev)->name)
|
||||
#define DEV_CFG(dev) \
|
||||
((const struct sam_xdmac_dev_cfg *const)(dev)->config)
|
||||
#define DEV_DATA(dev) \
|
||||
((struct sam_xdmac_dev_data *const)(dev)->data)
|
||||
|
||||
static void sam_xdmac_isr(const struct device *dev)
|
||||
{
|
||||
const struct sam_xdmac_dev_cfg *const dev_cfg = DEV_CFG(dev);
|
||||
struct sam_xdmac_dev_data *const dev_data = DEV_DATA(dev);
|
||||
const struct sam_xdmac_dev_cfg *const dev_cfg = dev->config;
|
||||
struct sam_xdmac_dev_data *const dev_data = dev->data;
|
||||
|
||||
Xdmac *const xdmac = dev_cfg->regs;
|
||||
struct sam_xdmac_channel_cfg *channel_cfg;
|
||||
uint32_t isr_status;
|
||||
|
|
@ -85,7 +82,8 @@ static void sam_xdmac_isr(const struct device *dev)
|
|||
int sam_xdmac_channel_configure(const struct device *dev, uint32_t channel,
|
||||
struct sam_xdmac_channel_config *param)
|
||||
{
|
||||
const struct sam_xdmac_dev_cfg *const dev_cfg = DEV_CFG(dev);
|
||||
const struct sam_xdmac_dev_cfg *const dev_cfg = dev->config;
|
||||
|
||||
Xdmac *const xdmac = dev_cfg->regs;
|
||||
|
||||
if (channel >= DMA_CHANNELS_NO) {
|
||||
|
|
@ -127,7 +125,8 @@ int sam_xdmac_channel_configure(const struct device *dev, uint32_t channel,
|
|||
int sam_xdmac_transfer_configure(const struct device *dev, uint32_t channel,
|
||||
struct sam_xdmac_transfer_config *param)
|
||||
{
|
||||
const struct sam_xdmac_dev_cfg *const dev_cfg = DEV_CFG(dev);
|
||||
const struct sam_xdmac_dev_cfg *const dev_cfg = dev->config;
|
||||
|
||||
Xdmac *const xdmac = dev_cfg->regs;
|
||||
|
||||
if (channel >= DMA_CHANNELS_NO) {
|
||||
|
|
@ -179,7 +178,7 @@ int sam_xdmac_transfer_configure(const struct device *dev, uint32_t channel,
|
|||
static int sam_xdmac_config(const struct device *dev, uint32_t channel,
|
||||
struct dma_config *cfg)
|
||||
{
|
||||
struct sam_xdmac_dev_data *const dev_data = DEV_DATA(dev);
|
||||
struct sam_xdmac_dev_data *const dev_data = dev->data;
|
||||
struct sam_xdmac_channel_config channel_cfg;
|
||||
struct sam_xdmac_transfer_config transfer_cfg;
|
||||
uint32_t burst_size;
|
||||
|
|
@ -274,7 +273,7 @@ static int sam_xdmac_config(const struct device *dev, uint32_t channel,
|
|||
static int sam_xdmac_transfer_reload(const struct device *dev, uint32_t channel,
|
||||
uint32_t src, uint32_t dst, size_t size)
|
||||
{
|
||||
struct sam_xdmac_dev_data *const dev_data = DEV_DATA(dev);
|
||||
struct sam_xdmac_dev_data *const dev_data = dev->data;
|
||||
struct sam_xdmac_transfer_config transfer_cfg = {
|
||||
.sa = src,
|
||||
.da = dst,
|
||||
|
|
@ -286,7 +285,9 @@ static int sam_xdmac_transfer_reload(const struct device *dev, uint32_t channel,
|
|||
|
||||
int sam_xdmac_transfer_start(const struct device *dev, uint32_t channel)
|
||||
{
|
||||
Xdmac *const xdmac = DEV_CFG(dev)->regs;
|
||||
const struct sam_xdmac_dev_cfg *config = dev->config;
|
||||
|
||||
Xdmac *const xdmac = config->regs;
|
||||
|
||||
if (channel >= DMA_CHANNELS_NO) {
|
||||
return -EINVAL;
|
||||
|
|
@ -307,7 +308,9 @@ int sam_xdmac_transfer_start(const struct device *dev, uint32_t channel)
|
|||
|
||||
int sam_xdmac_transfer_stop(const struct device *dev, uint32_t channel)
|
||||
{
|
||||
Xdmac *const xdmac = DEV_CFG(dev)->regs;
|
||||
const struct sam_xdmac_dev_cfg *config = dev->config;
|
||||
|
||||
Xdmac *const xdmac = config->regs;
|
||||
|
||||
if (channel >= DMA_CHANNELS_NO) {
|
||||
return -EINVAL;
|
||||
|
|
@ -332,7 +335,8 @@ int sam_xdmac_transfer_stop(const struct device *dev, uint32_t channel)
|
|||
|
||||
static int sam_xdmac_initialize(const struct device *dev)
|
||||
{
|
||||
const struct sam_xdmac_dev_cfg *const dev_cfg = DEV_CFG(dev);
|
||||
const struct sam_xdmac_dev_cfg *const dev_cfg = dev->config;
|
||||
|
||||
Xdmac *const xdmac = dev_cfg->regs;
|
||||
|
||||
/* Configure interrupts */
|
||||
|
|
|
|||
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Add table
Add a link
Reference in a new issue