diff --git a/drivers/gpio/gpio_stm32.c b/drivers/gpio/gpio_stm32.c index bd979685071..8c1cd8d2ee7 100644 --- a/drivers/gpio/gpio_stm32.c +++ b/drivers/gpio/gpio_stm32.c @@ -194,12 +194,18 @@ const int gpio_stm32_enable_int(int port, int pin) defined(CONFIG_SOC_SERIES_STM32F3X) || \ defined(CONFIG_SOC_SERIES_STM32F4X) || \ defined(CONFIG_SOC_SERIES_STM32F7X) || \ + defined(CONFIG_SOC_SERIES_STM32H7X) || \ defined(CONFIG_SOC_SERIES_STM32L1X) || \ defined(CONFIG_SOC_SERIES_STM32L4X) struct device *clk = device_get_binding(STM32_CLOCK_CONTROL_NAME); struct stm32_pclken pclken = { +#ifdef CONFIG_SOC_SERIES_STM32H7X + .bus = STM32_CLOCK_BUS_APB4, + .enr = LL_APB4_GRP1_PERIPH_SYSCFG +#else .bus = STM32_CLOCK_BUS_APB2, .enr = LL_APB2_GRP1_PERIPH_SYSCFG +#endif /* CONFIG_SOC_SERIES_STM32H7X */ }; /* Enable SYSCFG clock */ clock_control_on(clk, (clock_control_subsys_t *) &pclken); diff --git a/drivers/gpio/gpio_stm32.h b/drivers/gpio/gpio_stm32.h index 77acb2f3827..8b89590fc29 100644 --- a/drivers/gpio/gpio_stm32.h +++ b/drivers/gpio/gpio_stm32.h @@ -83,6 +83,19 @@ #define STM32_PERIPH_GPIOI LL_AHB1_GRP1_PERIPH_GPIOI #define STM32_PERIPH_GPIOJ LL_AHB1_GRP1_PERIPH_GPIOJ #define STM32_PERIPH_GPIOK LL_AHB1_GRP1_PERIPH_GPIOK +#elif CONFIG_SOC_SERIES_STM32H7X +#define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB4 +#define STM32_PERIPH_GPIOA LL_AHB4_GRP1_PERIPH_GPIOA +#define STM32_PERIPH_GPIOB LL_AHB4_GRP1_PERIPH_GPIOB +#define STM32_PERIPH_GPIOC LL_AHB4_GRP1_PERIPH_GPIOC +#define STM32_PERIPH_GPIOD LL_AHB4_GRP1_PERIPH_GPIOD +#define STM32_PERIPH_GPIOE LL_AHB4_GRP1_PERIPH_GPIOE +#define STM32_PERIPH_GPIOF LL_AHB4_GRP1_PERIPH_GPIOF +#define STM32_PERIPH_GPIOG LL_AHB4_GRP1_PERIPH_GPIOG +#define STM32_PERIPH_GPIOH LL_AHB4_GRP1_PERIPH_GPIOH +#define STM32_PERIPH_GPIOI LL_AHB4_GRP1_PERIPH_GPIOI +#define STM32_PERIPH_GPIOJ LL_AHB4_GRP1_PERIPH_GPIOJ +#define STM32_PERIPH_GPIOK LL_AHB4_GRP1_PERIPH_GPIOK #elif CONFIG_SOC_SERIES_STM32L0X #define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_IOP #define STM32_PERIPH_GPIOA LL_IOP_GRP1_PERIPH_GPIOA diff --git a/dts/arm/st/h7/stm32h7.dtsi b/dts/arm/st/h7/stm32h7.dtsi index e1a4315ef43..ae5f0eecdce 100644 --- a/dts/arm/st/h7/stm32h7.dtsi +++ b/dts/arm/st/h7/stm32h7.dtsi @@ -6,6 +6,7 @@ #include #include +#include / { cpus { @@ -49,6 +50,112 @@ reg = <0x58024400 0x400>; label = "STM32_CLK_RCC"; }; + + pinctrl: pin-controller@58020000 { + compatible = "st,stm32-pinmux"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x58020000 0x2400>; + + gpioa: gpio@58020000 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x58020000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000001>; + label = "GPIOA"; + }; + + gpiob: gpio@58020400 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x58020400 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000002>; + label = "GPIOB"; + }; + + gpioc: gpio@58020800 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x58020800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000004>; + label = "GPIOC"; + }; + + gpiod: gpio@58020C00 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x58020C00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000008>; + label = "GPIOD"; + }; + + gpioe: gpio@58021000 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x58021000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000010>; + label = "GPIOE"; + }; + + gpiof: gpio@58021400 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x58021400 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000020>; + label = "GPIOF"; + }; + + gpiog: gpio@58021800 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x58021800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000040>; + label = "GPIOG"; + }; + + gpioh: gpio@58021C00 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x58021C00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000080>; + label = "GPIOH"; + }; + + gpioi: gpio@58022000 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x58022000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000100>; + label = "GPIOI"; + }; + + gpioj: gpio@58022400 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x58022400 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000200>; + label = "GPIOJ"; + }; + + gpiok: gpio@58022800 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x58022800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000400>; + label = "GPIOK"; + }; + }; }; }; diff --git a/soc/arm/st_stm32/stm32h7/Kconfig.defconfig.series b/soc/arm/st_stm32/stm32h7/Kconfig.defconfig.series index 72fa3719939..1115c210722 100644 --- a/soc/arm/st_stm32/stm32h7/Kconfig.defconfig.series +++ b/soc/arm/st_stm32/stm32h7/Kconfig.defconfig.series @@ -18,7 +18,29 @@ if GPIO_STM32 # GPIO ports A, B and C are set in ../common/Kconfig.defconfig.series -# empty for now +config GPIO_STM32_PORTD + default y + +config GPIO_STM32_PORTE + default y + +config GPIO_STM32_PORTF + default y + +config GPIO_STM32_PORTG + default y + +config GPIO_STM32_PORTH + default y + +config GPIO_STM32_PORTI + default y + +config GPIO_STM32_PORTJ + default y + +config GPIO_STM32_PORTK + default y endif # GPIO_STM32 diff --git a/soc/arm/st_stm32/stm32h7/dts_fixup.h b/soc/arm/st_stm32/stm32h7/dts_fixup.h index e13e6dab28a..52aa7c85452 100644 --- a/soc/arm/st_stm32/stm32h7/dts_fixup.h +++ b/soc/arm/st_stm32/stm32h7/dts_fixup.h @@ -10,4 +10,102 @@ #define DT_NUM_MPU_REGIONS DT_ARM_ARMV7M_MPU_E000ED90_ARM_NUM_MPU_REGIONS +#define DT_GPIO_STM32_GPIOA_BASE_ADDRESS DT_ST_STM32_GPIO_58020000_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOA_CLOCK_BITS_0 DT_ST_STM32_GPIO_58020000_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOA_CLOCK_BUS_0 DT_ST_STM32_GPIO_58020000_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOA_CLOCK_CONTROLLER DT_ST_STM32_GPIO_58020000_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOA_LABEL DT_ST_STM32_GPIO_58020000_LABEL +#define DT_GPIO_STM32_GPIOA_SIZE DT_ST_STM32_GPIO_58020000_SIZE +#define DT_GPIO_STM32_GPIOA_CLOCK_BITS DT_ST_STM32_GPIO_58020000_CLOCK_BITS +#define DT_GPIO_STM32_GPIOA_CLOCK_BUS DT_ST_STM32_GPIO_58020000_CLOCK_BUS + +#define DT_GPIO_STM32_GPIOB_BASE_ADDRESS DT_ST_STM32_GPIO_58020400_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOB_CLOCK_BITS_0 DT_ST_STM32_GPIO_58020400_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOB_CLOCK_BUS_0 DT_ST_STM32_GPIO_58020400_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOB_CLOCK_CONTROLLER DT_ST_STM32_GPIO_58020400_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOB_LABEL DT_ST_STM32_GPIO_58020400_LABEL +#define DT_GPIO_STM32_GPIOB_SIZE DT_ST_STM32_GPIO_58020400_SIZE +#define DT_GPIO_STM32_GPIOB_CLOCK_BITS DT_ST_STM32_GPIO_58020400_CLOCK_BITS +#define DT_GPIO_STM32_GPIOB_CLOCK_BUS DT_ST_STM32_GPIO_58020400_CLOCK_BUS + +#define DT_GPIO_STM32_GPIOC_BASE_ADDRESS DT_ST_STM32_GPIO_58020800_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOC_CLOCK_BITS_0 DT_ST_STM32_GPIO_58020800_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOC_CLOCK_BUS_0 DT_ST_STM32_GPIO_58020800_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOC_CLOCK_CONTROLLER DT_ST_STM32_GPIO_58020800_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOC_LABEL DT_ST_STM32_GPIO_58020800_LABEL +#define DT_GPIO_STM32_GPIOC_SIZE DT_ST_STM32_GPIO_58020800_SIZE +#define DT_GPIO_STM32_GPIOC_CLOCK_BITS DT_ST_STM32_GPIO_58020800_CLOCK_BITS +#define DT_GPIO_STM32_GPIOC_CLOCK_BUS DT_ST_STM32_GPIO_58020800_CLOCK_BUS + +#define DT_GPIO_STM32_GPIOD_BASE_ADDRESS DT_ST_STM32_GPIO_58020C00_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOD_CLOCK_BITS_0 DT_ST_STM32_GPIO_58020C00_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOD_CLOCK_BUS_0 DT_ST_STM32_GPIO_58020C00_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOD_CLOCK_CONTROLLER DT_ST_STM32_GPIO_58020C00_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOD_LABEL DT_ST_STM32_GPIO_58020C00_LABEL +#define DT_GPIO_STM32_GPIOD_SIZE DT_ST_STM32_GPIO_58020C00_SIZE +#define DT_GPIO_STM32_GPIOD_CLOCK_BITS DT_ST_STM32_GPIO_58020C00_CLOCK_BITS +#define DT_GPIO_STM32_GPIOD_CLOCK_BUS DT_ST_STM32_GPIO_58020C00_CLOCK_BUS + +#define DT_GPIO_STM32_GPIOE_BASE_ADDRESS DT_ST_STM32_GPIO_58021000_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOE_CLOCK_BITS_0 DT_ST_STM32_GPIO_58021000_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOE_CLOCK_BUS_0 DT_ST_STM32_GPIO_58021000_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOE_CLOCK_CONTROLLER DT_ST_STM32_GPIO_58021000_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOE_LABEL DT_ST_STM32_GPIO_58021000_LABEL +#define DT_GPIO_STM32_GPIOE_SIZE DT_ST_STM32_GPIO_58021000_SIZE +#define DT_GPIO_STM32_GPIOE_CLOCK_BITS DT_ST_STM32_GPIO_58021000_CLOCK_BITS +#define DT_GPIO_STM32_GPIOE_CLOCK_BUS DT_ST_STM32_GPIO_58021000_CLOCK_BUS + +#define DT_GPIO_STM32_GPIOF_BASE_ADDRESS DT_ST_STM32_GPIO_58021400_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOF_CLOCK_BITS_0 DT_ST_STM32_GPIO_58021400_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOF_CLOCK_BUS_0 DT_ST_STM32_GPIO_58021400_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOF_CLOCK_CONTROLLER DT_ST_STM32_GPIO_58021400_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOF_LABEL DT_ST_STM32_GPIO_58021400_LABEL +#define DT_GPIO_STM32_GPIOF_SIZE DT_ST_STM32_GPIO_58021400_SIZE +#define DT_GPIO_STM32_GPIOF_CLOCK_BITS DT_ST_STM32_GPIO_58021400_CLOCK_BITS +#define DT_GPIO_STM32_GPIOF_CLOCK_BUS DT_ST_STM32_GPIO_58021400_CLOCK_BUS + +#define DT_GPIO_STM32_GPIOG_BASE_ADDRESS DT_ST_STM32_GPIO_58021800_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOG_CLOCK_BITS_0 DT_ST_STM32_GPIO_58021800_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOG_CLOCK_BUS_0 DT_ST_STM32_GPIO_58021800_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOG_CLOCK_CONTROLLER DT_ST_STM32_GPIO_58021800_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOG_LABEL DT_ST_STM32_GPIO_58021800_LABEL +#define DT_GPIO_STM32_GPIOG_SIZE DT_ST_STM32_GPIO_58021800_SIZE +#define DT_GPIO_STM32_GPIOG_CLOCK_BITS DT_ST_STM32_GPIO_58021800_CLOCK_BITS +#define DT_GPIO_STM32_GPIOG_CLOCK_BUS DT_ST_STM32_GPIO_58021800_CLOCK_BUS + +#define DT_GPIO_STM32_GPIOH_BASE_ADDRESS DT_ST_STM32_GPIO_58021C00_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOH_CLOCK_BITS_0 DT_ST_STM32_GPIO_58021C00_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOH_CLOCK_BUS_0 DT_ST_STM32_GPIO_58021C00_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOH_CLOCK_CONTROLLER DT_ST_STM32_GPIO_58021C00_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOH_LABEL DT_ST_STM32_GPIO_58021C00_LABEL +#define DT_GPIO_STM32_GPIOH_SIZE DT_ST_STM32_GPIO_58021C00_SIZE +#define DT_GPIO_STM32_GPIOH_CLOCK_BITS DT_ST_STM32_GPIO_58021C00_CLOCK_BITS +#define DT_GPIO_STM32_GPIOH_CLOCK_BUS DT_ST_STM32_GPIO_58021C00_CLOCK_BUS + +#define DT_GPIO_STM32_GPIOI_BASE_ADDRESS DT_ST_STM32_GPIO_58022000_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOI_CLOCK_BITS_0 DT_ST_STM32_GPIO_58022000_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOI_CLOCK_BUS_0 DT_ST_STM32_GPIO_58022000_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOI_CLOCK_CONTROLLER DT_ST_STM32_GPIO_58022000_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOI_LABEL DT_ST_STM32_GPIO_58022000_LABEL +#define DT_GPIO_STM32_GPIOI_SIZE DT_ST_STM32_GPIO_58022000_SIZE +#define DT_GPIO_STM32_GPIOI_CLOCK_BITS DT_ST_STM32_GPIO_58022000_CLOCK_BITS +#define DT_GPIO_STM32_GPIOI_CLOCK_BUS DT_ST_STM32_GPIO_58022000_CLOCK_BUS + +#define DT_GPIO_STM32_GPIOJ_BASE_ADDRESS DT_ST_STM32_GPIO_58022400_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOJ_CLOCK_BITS_0 DT_ST_STM32_GPIO_58022400_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOJ_CLOCK_BUS_0 DT_ST_STM32_GPIO_58022400_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOJ_CLOCK_CONTROLLER DT_ST_STM32_GPIO_58022400_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOJ_LABEL DT_ST_STM32_GPIO_58022400_LABEL +#define DT_GPIO_STM32_GPIOJ_SIZE DT_ST_STM32_GPIO_58022400_SIZE +#define DT_GPIO_STM32_GPIOJ_CLOCK_BITS DT_ST_STM32_GPIO_58022400_CLOCK_BITS +#define DT_GPIO_STM32_GPIOJ_CLOCK_BUS DT_ST_STM32_GPIO_58022400_CLOCK_BUS + +#define DT_GPIO_STM32_GPIOK_BASE_ADDRESS DT_ST_STM32_GPIO_58022800_BASE_ADDRESS +#define DT_GPIO_STM32_GPIOK_CLOCK_BITS_0 DT_ST_STM32_GPIO_58022800_CLOCK_BITS_0 +#define DT_GPIO_STM32_GPIOK_CLOCK_BUS_0 DT_ST_STM32_GPIO_58022800_CLOCK_BUS_0 +#define DT_GPIO_STM32_GPIOK_CLOCK_CONTROLLER DT_ST_STM32_GPIO_58022800_CLOCK_CONTROLLER +#define DT_GPIO_STM32_GPIOK_LABEL DT_ST_STM32_GPIO_58022800_LABEL +#define DT_GPIO_STM32_GPIOK_SIZE DT_ST_STM32_GPIO_58022800_SIZE +#define DT_GPIO_STM32_GPIOK_CLOCK_BITS DT_ST_STM32_GPIO_58022800_CLOCK_BITS +#define DT_GPIO_STM32_GPIOK_CLOCK_BUS DT_ST_STM32_GPIO_58022800_CLOCK_BUS /* End of SoC Level DTS fixup file */ diff --git a/soc/arm/st_stm32/stm32h7/soc.h b/soc/arm/st_stm32/stm32h7/soc.h index 0d803d6d0a6..a01d4f72613 100644 --- a/soc/arm/st_stm32/stm32h7/soc.h +++ b/soc/arm/st_stm32/stm32h7/soc.h @@ -28,6 +28,11 @@ #include #endif /* CONFIG_EXTI_STM32 */ +#ifdef CONFIG_GPIO_STM32 +#include +#include +#endif /* CONFIG_GPIO_STM32 */ + #endif /* !_ASMLANGUAGE */ #endif /* _STM32F7_SOC_H7_ */