michaelh/zephyr
1
0
Fork 0
Code Releases Activity

esp32: drivers: clock_control: code refactoring

Browse source 
code refactoring.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
This commit is contained in:
Glauber Maroto Ferreira 2021-08-03 15:34:03 -03:00 • committed by Christopher Friedt
commit d15d3de5fc
3 changed files with 178 additions and 294 deletions
Download patch file Download diff file Expand all files Collapse all files

92
include/dt-bindings/clock/esp32_clock.h
View file

@ -1,5 +1,6 @@
/*
* Copyright (c) 2020 Mohamed ElShahawi
* Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -11,6 +12,7 @@
#define ESP32_CLK_SRC_XTAL 0U
#define ESP32_CLK_SRC_PLL 1U
#define ESP32_CLK_SRC_RTC8M 2U
#define ESP32_CLK_SRC_APLL 3U
/* Supported CPU Frequencies */
#define ESP32_CLK_CPU_26M 26U
@ -20,8 +22,10 @@
#define ESP32_CLK_CPU_240M 240U
/* Supported XTAL Frequencies */
#define ESP32_CLK_XTAL_40M 0U
#define ESP32_CLK_XTAL_24M 0U
#define ESP32_CLK_XTAL_26M 1U
#define ESP32_CLK_XTAL_40M 2U
#define ESP32_CLK_XTAL_AUTO 3U
/* Modules IDs
* These IDs are actually offsets in CLK and RST Control registers.
@ -31,54 +35,42 @@
* Basic Modules
* Registers: DPORT_PERIP_CLK_EN_REG, DPORT_PERIP_RST_EN_REG
*/
#define ESP32_TIMERS_MODULE 0
#define ESP32_SPI1_MODULE 1
#define ESP32_UART0_MODULE 2
#define ESP32_WDG_MODULE 3
#define ESP32_I2S0_MODULE 4
#define ESP32_UART1_MODULE 5
#define ESP32_SPI2_MODULE 6
#define ESP32_I2C_EXT0_MODULE 7
#define ESP32_UHCI0_MODULE 8
#define ESP32_RMT_MODULE 9
#define ESP32_PCNT_MODULE 10
#define ESP32_LEDC_MODULE 11
#define ESP32_UHCI1_MODULE 12
#define ESP32_TIMERGROUP_MODULE 13
#define ESP32_EFUSE_MODULE 14
#define ESP32_TIMERGROUP1_MODULE 15
#define ESP32_SPI3_MODULE 16
#define ESP32_PWM0_MODULE 17
#define ESP32_I2C_EXT1_MODULE 18
#define ESP32_CAN_MODULE 19
#define ESP32_PWM1_MODULE 20
#define ESP32_I2S1_MODULE 21
#define ESP32_SPI_DMA_MODULE 22
#define ESP32_UART2_MODULE 23
#define ESP32_UART_MEM_MODULE 24
#define ESP32_PWM2_MODULE 25
#define ESP32_PWM3_MODULE 26
/* HW Security Modules
* Registers: DPORT_PERI_CLK_EN_REG, DPORT_PERI_RST_EN_REG
*/
#define ESP32_AES_MODULE 32
#define ESP32_SHA_MODULE 33
#define ESP32_RSA_MODULE 34
#define ESP32_SECUREBOOT_MODULE 35 /* Secure boot reset will hold SHA & AES in reset */
#define ESP32_DIGITAL_SIGNATURE_MODULE 36 /* Digital signature reset will hold AES & RSA in reset */
/* WiFi/BT
* Registers: DPORT_WIFI_CLK_EN_REG, DPORT_CORE_RST_EN_REG
*/
#define ESP32_SDMMC_MODULE 64
#define ESP32_SDIO_SLAVE_MODULE 65
#define ESP32_EMAC_MODULE 66
#define ESP32_RNG_MODULE 67
#define ESP32_WIFI_MODULE 68
#define ESP32_BT_MODULE 69
#define ESP32_WIFI_BT_COMMON_MODULE 70
#define ESP32_BT_BASEBAND_MODULE 71
#define ESP32_BT_LC_MODULE 72
#define ESP32_LEDC_MODULE 0
#define ESP32_UART0_MODULE 1
#define ESP32_UART1_MODULE 2
#define ESP32_UART2_MODULE 3
#define ESP32_I2C0_MODULE 4
#define ESP32_I2C1_MODULE 5
#define ESP32_I2S0_MODULE 6
#define ESP32_I2S1_MODULE 7
#define ESP32_TIMG0_MODULE 8
#define ESP32_TIMG1_MODULE 9
#define ESP32_PWM0_MODULE 10
#define ESP32_PWM1_MODULE 11
#define ESP32_PWM2_MODULE 12
#define ESP32_PWM3_MODULE 13
#define ESP32_UHCI0_MODULE 14
#define ESP32_UHCI1_MODULE 15
#define ESP32_RMT_MODULE 16
#define ESP32_PCNT_MODULE 17
#define ESP32_SPI_MODULE 18
#define ESP32_HSPI_MODULE 19
#define ESP32_VSPI_MODULE 20
#define ESP32_SPI_DMA_MODULE 21
#define ESP32_SDMMC_MODULE 22
#define ESP32_SDIO_SLAVE_MODULE 23
#define ESP32_TWAI_MODULE 24
#define ESP32_CAN_MODULE ESP32_TWAI_MODULE
#define ESP32_EMAC_MODULE 25
#define ESP32_RNG_MODULE 26
#define ESP32_WIFI_MODULE 27
#define ESP32_BT_MODULE 28
#define ESP32_WIFI_BT_COMMON_MODULE 29
#define ESP32_BT_BASEBAND_MODULE 30
#define ESP32_BT_LC_MODULE 31
#define ESP32_AES_MODULE 32
#define ESP32_SHA_MODULE 33
#define ESP32_RSA_MODULE 34
#define ESP32_MODULE_MAX 35
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32_H_ */