From d14794a837ffa8cacb9e7dba4bfb75f6c80c99d2 Mon Sep 17 00:00:00 2001
From: Anas Nashif <anas.nashif@intel.com>
Date: Tue, 17 Sep 2019 12:56:34 -0400
Subject: [PATCH] drivers: pinmux: remove qmsi pinmux driver

No users of this driver after dropping quark platforms.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
---
 drivers/pinmux/CMakeLists.txt |  1 -
 drivers/pinmux/Kconfig        |  6 ---
 drivers/pinmux/pinmux_qmsi.c  | 89 -----------------------------------
 3 files changed, 96 deletions(-)
 delete mode 100644 drivers/pinmux/pinmux_qmsi.c

diff --git a/drivers/pinmux/CMakeLists.txt b/drivers/pinmux/CMakeLists.txt
index 988a5808f89..4148fbd4bad 100644
--- a/drivers/pinmux/CMakeLists.txt
+++ b/drivers/pinmux/CMakeLists.txt
@@ -8,7 +8,6 @@ zephyr_sources_ifdef(CONFIG_PINMUX_SIFIVE          pinmux_sifive.c)
 zephyr_sources_ifdef(CONFIG_PINMUX_XEC             pinmux_mchp_xec.c)
 zephyr_sources_ifdef(CONFIG_PINMUX_MCUX            pinmux_mcux.c)
 zephyr_sources_ifdef(CONFIG_PINMUX_MCUX_LPC        pinmux_mcux_lpc.c)
-zephyr_sources_ifdef(CONFIG_PINMUX_QMSI            pinmux_qmsi.c)
 zephyr_sources_ifdef(CONFIG_PINMUX_STM32           stm32/pinmux_stm32.c)
 zephyr_sources_ifdef(CONFIG_PINMUX_SAM0            pinmux_sam0.c)
 zephyr_sources_ifdef(CONFIG_PINMUX_INTEL_S1000     pinmux_intel_s1000.c)
diff --git a/drivers/pinmux/Kconfig b/drivers/pinmux/Kconfig
index d9eedb8fdc3..7eda3716498 100644
--- a/drivers/pinmux/Kconfig
+++ b/drivers/pinmux/Kconfig
@@ -33,12 +33,6 @@ config PINMUX_INIT_PRIORITY
 	  rule for particular boards. Don't change this value unless you
 	  know what you are doing.
 
-config PINMUX_QMSI
-	bool "Enable QMSI pinmux dev driver"
-	depends on QMSI
-	help
-	  Enables the pinmux dev driver for QMSI supported boards.
-
 source "drivers/pinmux/Kconfig.mcux"
 
 source "drivers/pinmux/Kconfig.mcux_lpc"
diff --git a/drivers/pinmux/pinmux_qmsi.c b/drivers/pinmux/pinmux_qmsi.c
deleted file mode 100644
index 308e81ddab1..00000000000
--- a/drivers/pinmux/pinmux_qmsi.c
+++ /dev/null
@@ -1,89 +0,0 @@
-/* pinmux_qmsi.c -  QMSI pinmux dev driver */
-
-/*
- * Copyright (c) 2016 Intel Corporation
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <errno.h>
-#include <drivers/pinmux.h>
-
-#include "qm_pinmux.h"
-
-#define MASK_2_BITS	0x3
-
-static int pinmux_set(struct device *dev, u32_t pin,
-			  u32_t func)
-{
-	ARG_UNUSED(dev);
-
-	return qm_pmux_select(pin, func) == 0 ? 0 : -EIO;
-}
-
-static int pinmux_get(struct device *dev, u32_t pin,
-			  u32_t *func)
-{
-	ARG_UNUSED(dev);
-
-	/*
-	 * pinmux control registers are 32-bit wide, but each pin requires
-	 * 2 bits to set the mode (A, B, C, or D).  As such we only get 16
-	 * pins per register.
-	 */
-	u32_t reg_offset = pin >> 4;
-
-	/* The pin offset within the register */
-	u32_t pin_no = pin % 16;
-
-	/*
-	 * Now figure out what is the full address for the register
-	 * we are looking for.
-	 */
-	volatile u32_t *mux_register = &QM_SCSS_PMUX->pmux_sel[reg_offset];
-
-	/*
-	 * MASK_2_BITS (the value of which is 3) is used because there are
-	 * 2 bits for the mode of each pin.
-	 */
-	u32_t pin_mask = MASK_2_BITS << (pin_no << 1);
-	u32_t mode_mask = *mux_register & pin_mask;
-	u32_t mode = mode_mask >> (pin_no << 1);
-
-	*func = mode;
-
-	return 0;
-}
-
-static int pinmux_pullup(struct device *dev, u32_t pin,
-			     u8_t func)
-{
-	ARG_UNUSED(dev);
-
-	return qm_pmux_pullup_en(pin, func) == 0 ? 0 : -EIO;
-}
-
-static int pinmux_input(struct device *dev, u32_t pin,
-			    u8_t func)
-{
-	ARG_UNUSED(dev);
-
-	return qm_pmux_input_en(pin, func) == 0 ? 0 : -EIO;
-}
-
-static struct pinmux_driver_api api_funcs = {
-	.set = pinmux_set,
-	.get = pinmux_get,
-	.pullup = pinmux_pullup,
-	.input = pinmux_input
-};
-
-static int pinmux_initialize(struct device *port)
-{
-	return 0;
-}
-
-DEVICE_AND_API_INIT(pmux_dev, CONFIG_PINMUX_NAME,
-		    &pinmux_initialize, NULL, NULL,
-		    POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
-		    &api_funcs);