From d11864662bfa2668d7046319ed62881fe96834a5 Mon Sep 17 00:00:00 2001
From: Vincent Wan <vincent.wan@linaro.org>
Date: Thu, 25 Apr 2019 15:37:55 -0700
Subject: [PATCH] dts: arm: add device tree file for TI CC3235SF

This dtsi file adds definitions for memory regions on the SoC.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
---
 CODEOWNERS               |  1 +
 dts/arm/ti/cc3235sf.dtsi | 24 ++++++++++++++++++++++++
 2 files changed, 25 insertions(+)
 create mode 100644 dts/arm/ti/cc3235sf.dtsi

diff --git a/CODEOWNERS b/CODEOWNERS
index 89bdc20a1da..fceff56db15 100644
--- a/CODEOWNERS
+++ b/CODEOWNERS
@@ -179,6 +179,7 @@
 /dts/arm/st/                              @erwango
 /dts/arm/ti/cc13?2*                       @bwitherspoon
 /dts/arm/ti/cc26?2*                       @bwitherspoon
+/dts/arm/ti/cc3235*                       @vanti
 /dts/arm/nordic/                          @ioannisg @carlescufi
 /dts/arm/nxp/                             @MaureenHelm
 /dts/arm/microchip/                       @franciscomunoz @albertofloyd @scottwcpg
diff --git a/dts/arm/ti/cc3235sf.dtsi b/dts/arm/ti/cc3235sf.dtsi
new file mode 100644
index 00000000000..4e68cd9e019
--- /dev/null
+++ b/dts/arm/ti/cc3235sf.dtsi
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2019 Linaro Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+#include <ti/cc32xx.dtsi>
+
+/ {
+	sram0: memory@20000000 {
+		reg = <0x20000000 DT_SIZE_K(256)>;
+	};
+
+	flash0: serial-flash@0 {
+		reg = <0x0 DT_SIZE_K(1024)>;
+	};
+
+	flash1: flash@1000000 {
+		compatible = "soc-nv-flash";
+		label = "FLASH_1";
+		reg = <0x01000000 DT_SIZE_K(1024)>;
+	};
+};