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arm: shrink names for null-pointer exception detection Kconfigs

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Reduce the length of the Kconfig defines related to
null-pointed dereference detection in Cortex-M.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2021-05-26 16:12:10 +02:00 • committed by Kumar Gala
commit d105a2b76c
9 changed files with 25 additions and 25 deletions
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2
arch/arm/core/aarch32/cortex_m/CMakeLists.txt
View file

@ -16,7 +16,7 @@ zephyr_library_sources(
zephyr_library_sources_ifdef(CONFIG_DEBUG_COREDUMP coredump.c)
zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE __aeabi_read_tp.S)
if(CONFIG_CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
if(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
zephyr_library_sources(debug.c)
endif()

14
arch/arm/core/aarch32/cortex_m/Kconfig
View file

@ -328,12 +328,12 @@ endmenu
# Implement the null pointer detection using either the Data Watchpoint and
# Trace Unit and the Debug Monitor Exception, or the Memory Protection Unit.
choice CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION
choice NULL_POINTER_EXCEPTION_DETECTION
bool "Enable and use null-pointer exception"
# Disable this until https://github.com/zephyrproject-rtos/zephyr/issues/32984 is fixed
# default CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_DWT if TEST_ARM_CORTEX_M && !ARM_NONSECURE_FIRMWARE && CPU_CORTEX_M_HAS_DWT
default CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_MPU if TEST_ARM_CORTEX_M && !ARM_NONSECURE_FIRMWARE && ARM_MPU && !CPU_CORTEX_M_HAS_DWT
default CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_NONE
# default NULL_POINTER_EXCEPTION_DETECTION_DWT if TEST_ARM_CORTEX_M && !ARM_NONSECURE_FIRMWARE && CPU_CORTEX_M_HAS_DWT
default NULL_POINTER_EXCEPTION_DETECTION_MPU if TEST_ARM_CORTEX_M && !ARM_NONSECURE_FIRMWARE && ARM_MPU && !CPU_CORTEX_M_HAS_DWT
default NULL_POINTER_EXCEPTION_DETECTION_NONE
help
There are 2 implementations available, one based
on DWT and the other based on MPU. Use this choice
@ -341,13 +341,13 @@ choice CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION
feature is disabled. In the test suite the feature
is enabled and the DWT-based solution is preferred.
config CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_NONE
config NULL_POINTER_EXCEPTION_DETECTION_NONE
bool "Do not enable null pointer exception detection"
help
Null pointer exception detection feature is not
enabled.
config CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_DWT
config NULL_POINTER_EXCEPTION_DETECTION_DWT
bool "Use DWT for null pointer exception detection"
depends on CPU_CORTEX_M_HAS_DWT
depends on !TRUSTED_EXECUTION_NONSECURE
@ -365,7 +365,7 @@ config CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_DWT
for ARMv8-M).
- Requires the Cortex-M core be in normal mode.
config CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_MPU
config NULL_POINTER_EXCEPTION_DETECTION_MPU
bool "Use MPU for null pointer exception detection"
depends on !TRUSTED_EXECUTION_NONSECURE
depends on ARM_MPU

8
arch/arm/core/aarch32/cortex_m/debug.c
View file

@ -23,7 +23,7 @@
*/
bool z_arm_debug_monitor_event_error_check(void)
{
#if defined(CONFIG_CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
#if defined(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
/* Assess whether this debug exception was triggered
* as a result of a null pointer (R/W) dereferencing.
*/
@ -44,11 +44,11 @@ bool z_arm_debug_monitor_event_error_check(void)
*/
return true;
}
#endif /* CONFIG_CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_DWT */
#endif /* CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT */
return false;
}
#if defined(CONFIG_CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
#if defined(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
/* The area (0x0 - <size>) monitored by DWT needs to be a power of 2,
* so we add a build assert that catches it.
@ -121,4 +121,4 @@ static int z_arm_debug_enable_null_pointer_detection(const struct device *arg)
SYS_INIT(z_arm_debug_enable_null_pointer_detection, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* CONFIG_CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_DWT */
#endif /* CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT */

4
arch/arm/core/aarch32/cortex_m/fault.c
View file

@ -178,7 +178,7 @@ static bool memory_fault_recoverable(z_arch_esf_t *esf, bool synchronous)
uint32_t start = (uint32_t)exceptions[i].start & ~0x1U;
uint32_t end = (uint32_t)exceptions[i].end & ~0x1U;
#if defined(CONFIG_CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
#if defined(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
/* Non-synchronous exceptions (e.g. DebugMonitor) may have
* allowed PC to continue to the next instruction.
*/
@ -613,7 +613,7 @@ static void debug_monitor(z_arch_esf_t *esf, bool *recoverable)
PR_FAULT_INFO(
"***** Debug monitor exception *****");
#if defined(CONFIG_CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
#if defined(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
if (!z_arm_debug_monitor_event_error_check()) {
/* By default, all debug monitor exceptions that are not
* treated as errors by z_arm_debug_event_error_check(),

4
arch/arm/core/aarch32/mpu/arm_mpu.c
View file

@ -353,7 +353,7 @@ int z_arm_mpu_init(void)
/* Program additional fixed flash region for null-pointer
* dereferencing detection (debug feature)
*/
#if defined(CONFIG_CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_MPU)
#if defined(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_MPU)
#if (defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)) && \
(CONFIG_FLASH_BASE_ADDRESS > CONFIG_CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_PAGE_SIZE)
#pragma message "Null-Pointer exception detection cannot be configured on un-mapped flash areas"
@ -403,7 +403,7 @@ int z_arm_mpu_init(void)
static_regions_num++;
#endif
#endif /* CONFIG_CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_MPU */
#endif /* CONFIG_NULL_POINTER_EXCEPTION_DETECTION_MPU */
/* Sanity check for number of regions in Cortex-M0+, M3, and M4. */
#if defined(CONFIG_CPU_CORTEX_M0PLUS) || \

4
boards/arm/mps2_an521/Kconfig.defconfig
View file

@ -6,9 +6,9 @@ if BOARD_MPS2_AN521
# MPU-based null-pointer dereferencing detection cannot
# be applied as the (0x0 - 0x400) is unmapped but QEMU
# will still permit bus access.
choice CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION
choice NULL_POINTER_EXCEPTION_DETECTION
bool
default CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_NONE if QEMU_TARGET
default NULL_POINTER_EXCEPTION_DETECTION_NONE if QEMU_TARGET
endchoice
config BOARD

4
boards/arm/qemu_cortex_m3/Kconfig.defconfig
View file

@ -13,9 +13,9 @@ config GPIO_STELLARIS
depends on GPIO
# DWT is not properly emulated in QEMU
choice CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION
choice NULL_POINTER_EXCEPTION_DETECTION
bool
default CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_NONE
default NULL_POINTER_EXCEPTION_DETECTION_NONE
endchoice
endif # BOARD_QEMU_CORTEX_M3

4
soc/arm/nordic_nrf/Kconfig.defconfig
View file

@ -42,8 +42,8 @@ config GPIO
default y
depends on SPI
choice CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION
default CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_DWT if TEST_ARM_CORTEX_M && !ARM_NONSECURE_FIRMWARE && CPU_CORTEX_M_HAS_DWT
choice NULL_POINTER_EXCEPTION_DETECTION
default NULL_POINTER_EXCEPTION_DETECTION_DWT if TEST_ARM_CORTEX_M && !ARM_NONSECURE_FIRMWARE && CPU_CORTEX_M_HAS_DWT
endchoice
endif # SOC_FAMILY_NRF

6
tests/kernel/gen_isr_table/testcase.yaml
View file

@ -5,7 +5,7 @@ tests:
filter: CONFIG_GEN_ISR_TABLES and CONFIG_ARMV6_M_ARMV8_M_BASELINE
tags: kernel interrupt isr_table
extra_configs:
- CONFIG_CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y
- CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y
arch.interrupt.gen_isr_table.arm_mainline:
arch_allow: arm
platform_exclude: stmf103_mini nucleo_f103rb olimexino_stm32 stm32_min_dev_black
@ -14,12 +14,12 @@ tests:
filter: CONFIG_GEN_ISR_TABLES and CONFIG_ARMV7_M_ARMV8_M_MAINLINE
tags: kernel interrupt isr_table
extra_configs:
- CONFIG_CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y
- CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y
arch.interrupt.gen_isr_table.disabled:
arch_allow: arm
extra_configs:
- CONFIG_GEN_ISR_TABLES=n
- CONFIG_CORTEX_M_DEBUG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y
- CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y
tags: kernel interrupt isr_table
build_only: true
arch.interrupt.gen_isr_table.arc: