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boards: nordic: Add support for nRF54H20 DK

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Add targets for the Application, Radio, and PPR cores in the nRF54H20
SoC on the nRF54H20 DK board.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
Andrzej Głąbek 2024-03-12 15:00:05 +01:00 • committed by Fabio Baltieri
commit d0ce78f230
20 changed files with 883 additions and 0 deletions
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171
boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts Normal file
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/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <nordic/nrf54h20_cpuapp.dtsi>
#include "nrf54h20dk_nrf54h20-memory_map.dtsi"
#include "nrf54h20dk_nrf54h20-ipc_conf.dtsi"
#include "nrf54h20dk_nrf54h20-pinctrl.dtsi"
/delete-node/ &cpusec_cpurad_ipc;
/ {
compatible = "nordic,nrf54h20dk_nrf54h20-cpuapp";
model = "Nordic nRF54H20 DK nRF54H20 Application MCU";
chosen {
zephyr,console = &uart136;
zephyr,code-partition = &cpuapp_slot0_partition;
zephyr,flash = &mram1x;
zephyr,sram = &cpuapp_data;
};
aliases {
led0 = &led0;
led1 = &led1;
led2 = &led2;
led3 = &led3;
sw0 = &button0;
sw1 = &button1;
sw2 = &button2;
sw3 = &button3;
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
gpios = <&gpio0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button 0";
zephyr,code = <INPUT_KEY_0>;
};
button1: button_1 {
gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button 1";
zephyr,code = <INPUT_KEY_1>;
};
button2: button_2 {
gpios = <&gpio0 10 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button 2";
zephyr,code = <INPUT_KEY_2>;
};
button3: button_3 {
gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button 3";
zephyr,code = <INPUT_KEY_3>;
};
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio9 0 GPIO_ACTIVE_HIGH>;
label = "Green LED 0";
};
led1: led_1 {
gpios = <&gpio9 1 GPIO_ACTIVE_HIGH>;
label = "Green LED 1";
};
led2: led_2 {
gpios = <&gpio9 2 GPIO_ACTIVE_HIGH>;
label = "Green LED 2";
};
led3: led_3 {
gpios = <&gpio9 3 GPIO_ACTIVE_HIGH>;
label = "Green LED 3";
};
};
};
&cpuapp_ram0x_region {
status = "okay";
};
&shared_ram3x_region {
status = "okay";
};
&cpuapp_bellboard {
interrupts = <96 NRF_DEFAULT_IRQ_PRIORITY>;
interrupt-names = "irq0";
/* irq0: 0: cpuapp-cpusec, 13: cpuapp-cpuppr, 18: cpuapp-cpurad */
nordic,interrupt-mapping = <0x00042001 0>;
};
&cpusec_cpuapp_ipc {
mbox-names = "tx", "rx";
tx-region = <&cpuapp_cpusec_ipc_shm>;
rx-region = <&cpusec_cpuapp_ipc_shm>;
};
&cpuapp_cpurad_ipc {
compatible = "zephyr,ipc-icmsg-me-initiator";
mbox-names = "rx", "tx";
tx-region = <&cpuapp_cpurad_ipc_shm>;
rx-region = <&cpurad_cpuapp_ipc_shm>;
};
&cpuapp_cpuppr_ipc {
mbox-names = "rx", "tx";
tx-region = <&cpuapp_cpuppr_ipc_shm>;
rx-region = <&cpuppr_cpuapp_ipc_shm>;
};
&cpuapp_dma_region {
status = "okay";
};
&cpuapp_rx_partitions {
status = "okay";
};
&cpuppr_vpr {
execution-memory = <&cpuppr_code_partition>;
};
&gpiote130 {
status = "okay";
owned-channels = <0 1 2 3 4 5 6 7>;
};
&gpio0 {
status = "okay";
};
&gpio9 {
status = "okay";
};
&grtc {
status = "okay";
child-owned-channels = <5 6>;
nonsecure-channels = <5 6>;
owned-channels = <4 5 6>;
};
&uart135 {
current-speed = <115200>;
pinctrl-0 = <&uart135_default>;
pinctrl-1 = <&uart135_sleep>;
pinctrl-names = "default", "sleep";
};
&uart136 {
status = "okay";
memory-regions = <&cpuapp_dma_region>;
current-speed = <115200>;
pinctrl-0 = <&uart136_default>;
pinctrl-1 = <&uart136_sleep>;
pinctrl-names = "default", "sleep";
};