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boards: remove unused adc pinmux from kinetis boards

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adc16 driver supports pinctrl, so remove unused pinmux from kinetis
boards

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2022-03-07 17:51:03 -06:00 • committed by Carles Cufí
commit d0c535924f
8 changed files with 38 additions and 27 deletions
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24
boards/arm/frdm_k64f/frdm_k64f-pinctrl.dtsi
View file

@ -1,6 +1,6 @@
/*
* NOTE: Autogenerated file by kinetis_signal2dts.py
* for MK64FN1M0VLL12/signal_configuration.xml
* NOTE: Autogenerated file by kinetis_cfg_utils.py
* for MK64FN1M0VLL12/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
@ -10,6 +10,22 @@
#include <nxp/kinetis/MK64FN1M0VLL12-pinctrl.h>
&pinctrl {
adc0_default: adc0_default {
group0 {
pinmux = <ADC0_SE14_PTC0>;
drive-strength = "low";
slew-rate = "fast";
};
};
adc1_default: adc1_default {
group0 {
pinmux = <ADC1_SE14_PTB10>;
drive-strength = "low";
slew-rate = "fast";
};
};
enet_default: enet_default {
group0 {
pinmux = <RMII0_MDIO_PTB0>;
@ -73,6 +89,7 @@
};
};
/* PTC16 and PTC17 conflict with uart3 pins */
ptp_default: ptp_default {
group0 {
pinmux = <ENET0_1588_TMR0_PTC16>,
@ -83,6 +100,7 @@
};
};
/* pins conflict with uart2 */
spi0_default: spi0_default {
group0 {
pinmux = <SPI0_PCS0_PTD0>,
@ -103,6 +121,7 @@
};
};
/* pins conflict with spi0 */
uart2_default: uart2_default {
group0 {
pinmux = <UART2_CTS_b_PTD1>,
@ -114,6 +133,7 @@
};
};
/* PTC16 and PTC17 conflict with PTP timer pins */
uart3_default: uart3_default {
group0 {
pinmux = <UART3_RX_PTC16>,

4
boards/arm/frdm_k64f/frdm_k64f.dts
View file

@ -106,10 +106,14 @@ arduino_serial: &uart3 {
&adc0 {
status = "okay";
pinctrl-0 = <&adc0_default>;
pinctrl-names = "default";
};
&adc1 {
status = "okay";
pinctrl-0 = <&adc1_default>;
pinctrl-names = "default";
};
&temp1 {

5
boards/arm/frdm_k64f/pinmux.c
View file

@ -38,11 +38,6 @@ static int frdm_k64f_pinmux_init(const struct device *dev)
__ASSERT_NO_MSG(device_is_ready(porte));
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(adc1), okay) && CONFIG_ADC
/* ADC1_SE14 */
pinmux_pin_set(portb, 10, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog));
#endif
return 0;
}

5
boards/arm/frdm_k82f/pinmux.c
View file

@ -38,11 +38,6 @@ static int frdm_k82f_pinmux_init(const struct device *dev)
__ASSERT_NO_MSG(device_is_ready(porte));
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(adc0), okay) && CONFIG_ADC
/* ADC0_SE15 */
pinmux_pin_set(portc, 1, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog));
#endif
return 0;
}

5
boards/arm/frdm_kl25z/pinmux.c
View file

@ -38,11 +38,6 @@ static int frdm_kl25z_pinmux_init(const struct device *dev)
__ASSERT_NO_MSG(device_is_ready(porte));
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(adc0), okay) && CONFIG_ADC
/* ADC0_SE12 */
pinmux_pin_set(portb, 2, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog));
#endif
return 0;
}

5
boards/arm/frdm_kw41z/pinmux.c
View file

@ -40,11 +40,6 @@ static int frdm_kw41z_pinmux_init(const struct device *dev)
pinmux_pin_set(porta, 18, PORT_PCR_MUX(kPORT_MuxAlt5));
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(adc0), okay) && CONFIG_ADC
/* ADC0_SE3 */
pinmux_pin_set(portb, 2, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog));
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart0), okay) && CONFIG_SERIAL
/* UART0 RX, TX */
pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt4));

5
boards/arm/hexiwear_kw40z/pinmux.c
View file

@ -29,11 +29,6 @@ static int hexiwear_kw40z_pinmux_init(const struct device *dev)
pinmux_pin_set(portc, 7, PORT_PCR_MUX(kPORT_MuxAlt4));
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(adc0), okay) && CONFIG_ADC
/* ADC0_SE1 */
pinmux_pin_set(portb, 1, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog));
#endif
return 0;
}

12
samples/drivers/adc/boards/frdm_k64f.overlay Normal file
View file

@ -0,0 +1,12 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2022 NXP
*/
/ {
zephyr,user {
/* adjust channel number according to pinmux in board.dts */
io-channels = <&adc1 14>;
};
};