tests: gen_isr_table: move multilevel test into a separate file
The multilevel IRQ APIs tests are currently cordoned off by `CONFIG_MULTI_LEVEL_INTERRUPTS` compiler switch, do this more cleanly by moving it to another file and use cmake for that instead. Signed-off-by: Yong Cong Sin <ycsin@meta.com> Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
This commit is contained in:
Yong Cong Sin
Alberto Escolar
parent
3fa7d783d6
commit
d05c9e6037
3 changed files with 132 additions and 121 deletions
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@ -4,5 +4,9 @@ cmake_minimum_required(VERSION 3.20.0)
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find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
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project(gen_isr_table)
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FILE(GLOB app_sources src/*.c)
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FILE(GLOB app_sources src/main.c)
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target_sources(app PRIVATE ${app_sources})
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target_sources_ifdef(CONFIG_MULTI_LEVEL_INTERRUPTS app PRIVATE
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src/multilevel_irq.c
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)
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@ -7,7 +7,6 @@
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#include <zephyr/kernel.h>
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#include <zephyr/ztest.h>
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#include <zephyr/irq.h>
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#include <zephyr/irq_multilevel.h>
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#include <zephyr/tc_util.h>
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#include <zephyr/sw_isr_table.h>
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#include <zephyr/interrupt_util.h>
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@ -406,123 +405,4 @@ static void *gen_isr_table_setup(void)
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return NULL;
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}
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#ifdef CONFIG_MULTI_LEVEL_INTERRUPTS
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static void test_multi_level_bit_masks_fn(uint32_t irq1, uint32_t irq2, uint32_t irq3)
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{
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const uint32_t l2_shift = CONFIG_1ST_LEVEL_INTERRUPT_BITS;
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const uint32_t l3_shift = CONFIG_1ST_LEVEL_INTERRUPT_BITS + CONFIG_2ND_LEVEL_INTERRUPT_BITS;
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const uint32_t hwirq1 = irq1;
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const uint32_t hwirq2 = irq2 - 1;
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const uint32_t hwirq3 = irq3 - 1;
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const bool has_l3 = irq3 > 0;
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const bool has_l2 = irq2 > 0;
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const uint32_t level = has_l3 ? 3 : has_l2 ? 2 : 1;
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const uint32_t irqn_l1 = irq1;
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const uint32_t irqn_l2 = (irq2 << l2_shift) | irqn_l1;
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const uint32_t irqn = (irq3 << l3_shift) | irqn_l2;
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zassert_equal(level, irq_get_level(irqn));
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if (has_l2) {
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zassert_equal(hwirq2, irq_from_level_2(irqn));
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zassert_equal(hwirq2, irq_from_level(irqn, 2));
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zassert_equal((hwirq2 + 1) << l2_shift, irq_to_level_2(hwirq2));
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zassert_equal((hwirq2 + 1) << l2_shift, irq_to_level(hwirq2, 2));
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zassert_equal(hwirq1, irq_parent_level_2(irqn));
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zassert_equal(hwirq1, irq_parent_level(irqn, 2));
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}
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if (has_l3) {
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zassert_equal(hwirq3, irq_from_level_3(irqn));
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zassert_equal(hwirq3, irq_from_level(irqn, 3));
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zassert_equal((hwirq3 + 1) << l3_shift, irq_to_level_3(hwirq3));
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zassert_equal((hwirq3 + 1) << l3_shift, irq_to_level(hwirq3, 3));
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zassert_equal(hwirq2, irq_parent_level_3(irqn));
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zassert_equal(hwirq2, irq_parent_level(irqn, 3));
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}
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if (has_l3) {
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zassert_equal(irqn_l2, irq_get_intc_irq(irqn));
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} else if (has_l2) {
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zassert_equal(irqn_l1, irq_get_intc_irq(irqn));
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} else {
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/* degenerate cases */
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if (false) {
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zassert_equal(irqn, irq_get_intc_irq(irqn));
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}
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}
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}
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ZTEST(gen_isr_table, test_multi_level_bit_masks_l1)
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{
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uint32_t irq1;
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/* First IRQ of level 1 */
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irq1 = 0;
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test_multi_level_bit_masks_fn(irq1, 0, 0);
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/* Somewhere in-between */
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irq1 = BIT_MASK(CONFIG_1ST_LEVEL_INTERRUPT_BITS) >> 1;
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test_multi_level_bit_masks_fn(irq1, 0, 0);
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/* Last IRQ of level 1 */
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irq1 = BIT_MASK(CONFIG_1ST_LEVEL_INTERRUPT_BITS);
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test_multi_level_bit_masks_fn(irq1, 0, 0);
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}
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ZTEST(gen_isr_table, test_multi_level_bit_masks_l2)
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{
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if (!IS_ENABLED(CONFIG_2ND_LEVEL_INTERRUPTS)) {
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ztest_test_skip();
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}
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uint32_t irq1, irq2;
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/* First IRQ of level 2 */
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irq1 = 0;
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/* First irq of level 2 and onwards is 1, as 0 means that the irq is not present */
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irq2 = 1;
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test_multi_level_bit_masks_fn(irq1, irq2, 0);
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/* Somewhere in-between */
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irq1 = BIT_MASK(CONFIG_1ST_LEVEL_INTERRUPT_BITS) >> 1;
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irq2 = BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS) >> 1;
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test_multi_level_bit_masks_fn(irq1, irq2, 0);
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/* Last IRQ of level 2 */
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irq1 = BIT_MASK(CONFIG_1ST_LEVEL_INTERRUPT_BITS);
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irq2 = BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS);
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test_multi_level_bit_masks_fn(irq1, irq2, 0);
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}
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ZTEST(gen_isr_table, test_multi_level_bit_masks_l3)
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{
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if (!IS_ENABLED(CONFIG_3RD_LEVEL_INTERRUPTS)) {
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ztest_test_skip();
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}
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uint32_t irq1, irq2, irq3;
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/* First IRQ of level 3 */
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irq1 = 0;
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/* First irq of level 2 and onwards is 1, as 0 means that the irq is not present */
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irq2 = 1;
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irq3 = 1;
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test_multi_level_bit_masks_fn(irq1, irq2, irq3);
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/* Somewhere in-between */
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irq1 = BIT_MASK(CONFIG_1ST_LEVEL_INTERRUPT_BITS) >> 1;
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irq2 = BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS) >> 1;
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irq3 = BIT_MASK(CONFIG_3RD_LEVEL_INTERRUPT_BITS) >> 1;
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test_multi_level_bit_masks_fn(irq1, irq2, irq3);
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/* Last IRQ of level 3 */
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irq1 = BIT_MASK(CONFIG_1ST_LEVEL_INTERRUPT_BITS);
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irq2 = BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS);
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irq3 = BIT_MASK(CONFIG_3RD_LEVEL_INTERRUPT_BITS);
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test_multi_level_bit_masks_fn(irq1, irq2, irq3);
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}
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#endif /* CONFIG_MULTI_LEVEL_INTERRUPTS */
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ZTEST_SUITE(gen_isr_table, NULL, gen_isr_table_setup, NULL, NULL, NULL);
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127
tests/kernel/gen_isr_table/src/multilevel_irq.c
Normal file
127
tests/kernel/gen_isr_table/src/multilevel_irq.c
Normal file
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@ -0,0 +1,127 @@
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/*
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* Copyright (c) 2024 Meta Platforms
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/irq.h>
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#include <zephyr/irq_multilevel.h>
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#include <zephyr/ztest.h>
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static void test_multi_level_bit_masks_fn(uint32_t irq1, uint32_t irq2, uint32_t irq3)
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{
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const uint32_t l2_shift = CONFIG_1ST_LEVEL_INTERRUPT_BITS;
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const uint32_t l3_shift = CONFIG_1ST_LEVEL_INTERRUPT_BITS + CONFIG_2ND_LEVEL_INTERRUPT_BITS;
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const uint32_t hwirq1 = irq1;
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const uint32_t hwirq2 = irq2 - 1;
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const uint32_t hwirq3 = irq3 - 1;
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const bool has_l3 = irq3 > 0;
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const bool has_l2 = irq2 > 0;
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const uint32_t level = has_l3 ? 3 : has_l2 ? 2 : 1;
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const uint32_t irqn_l1 = irq1;
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const uint32_t irqn_l2 = (irq2 << l2_shift) | irqn_l1;
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const uint32_t irqn = (irq3 << l3_shift) | irqn_l2;
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zassert_equal(level, irq_get_level(irqn));
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if (has_l2) {
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zassert_equal(hwirq2, irq_from_level_2(irqn));
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zassert_equal(hwirq2, irq_from_level(irqn, 2));
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zassert_equal((hwirq2 + 1) << l2_shift, irq_to_level_2(hwirq2));
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zassert_equal((hwirq2 + 1) << l2_shift, irq_to_level(hwirq2, 2));
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zassert_equal(hwirq1, irq_parent_level_2(irqn));
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zassert_equal(hwirq1, irq_parent_level(irqn, 2));
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}
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if (has_l3) {
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zassert_equal(hwirq3, irq_from_level_3(irqn));
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zassert_equal(hwirq3, irq_from_level(irqn, 3));
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zassert_equal((hwirq3 + 1) << l3_shift, irq_to_level_3(hwirq3));
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zassert_equal((hwirq3 + 1) << l3_shift, irq_to_level(hwirq3, 3));
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zassert_equal(hwirq2, irq_parent_level_3(irqn));
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zassert_equal(hwirq2, irq_parent_level(irqn, 3));
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}
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if (has_l3) {
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zassert_equal(irqn_l2, irq_get_intc_irq(irqn));
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} else if (has_l2) {
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zassert_equal(irqn_l1, irq_get_intc_irq(irqn));
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} else {
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/* degenerate cases */
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if (false) {
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zassert_equal(irqn, irq_get_intc_irq(irqn));
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}
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}
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}
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ZTEST(gen_isr_table_multilevel, test_multi_level_bit_masks_l1)
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{
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uint32_t irq1;
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/* First IRQ of level 1 */
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irq1 = 0;
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test_multi_level_bit_masks_fn(irq1, 0, 0);
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/* Somewhere in-between */
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irq1 = BIT_MASK(CONFIG_1ST_LEVEL_INTERRUPT_BITS) >> 1;
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test_multi_level_bit_masks_fn(irq1, 0, 0);
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/* Last IRQ of level 1 */
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irq1 = BIT_MASK(CONFIG_1ST_LEVEL_INTERRUPT_BITS);
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test_multi_level_bit_masks_fn(irq1, 0, 0);
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}
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ZTEST(gen_isr_table_multilevel, test_multi_level_bit_masks_l2)
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{
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if (!IS_ENABLED(CONFIG_2ND_LEVEL_INTERRUPTS)) {
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ztest_test_skip();
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}
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uint32_t irq1, irq2;
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/* First IRQ of level 2 */
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irq1 = 0;
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/* First irq of level 2 and onwards is 1, as 0 means that the irq is not present */
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irq2 = 1;
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test_multi_level_bit_masks_fn(irq1, irq2, 0);
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/* Somewhere in-between */
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irq1 = BIT_MASK(CONFIG_1ST_LEVEL_INTERRUPT_BITS) >> 1;
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irq2 = BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS) >> 1;
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test_multi_level_bit_masks_fn(irq1, irq2, 0);
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/* Last IRQ of level 2 */
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irq1 = BIT_MASK(CONFIG_1ST_LEVEL_INTERRUPT_BITS);
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irq2 = BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS);
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test_multi_level_bit_masks_fn(irq1, irq2, 0);
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}
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ZTEST(gen_isr_table_multilevel, test_multi_level_bit_masks_l3)
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{
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if (!IS_ENABLED(CONFIG_3RD_LEVEL_INTERRUPTS)) {
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ztest_test_skip();
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}
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uint32_t irq1, irq2, irq3;
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/* First IRQ of level 3 */
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irq1 = 0;
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/* First irq of level 2 and onwards is 1, as 0 means that the irq is not present */
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irq2 = 1;
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irq3 = 1;
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test_multi_level_bit_masks_fn(irq1, irq2, irq3);
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/* Somewhere in-between */
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irq1 = BIT_MASK(CONFIG_1ST_LEVEL_INTERRUPT_BITS) >> 1;
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irq2 = BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS) >> 1;
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irq3 = BIT_MASK(CONFIG_3RD_LEVEL_INTERRUPT_BITS) >> 1;
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test_multi_level_bit_masks_fn(irq1, irq2, irq3);
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/* Last IRQ of level 3 */
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irq1 = BIT_MASK(CONFIG_1ST_LEVEL_INTERRUPT_BITS);
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irq2 = BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS);
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irq3 = BIT_MASK(CONFIG_3RD_LEVEL_INTERRUPT_BITS);
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test_multi_level_bit_masks_fn(irq1, irq2, irq3);
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}
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ZTEST_SUITE(gen_isr_table_multilevel, NULL, NULL, NULL, NULL, NULL);
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